by C.W. Tong. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1994. / Includes bibliographical references (leaves 96-98). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- The Availability of Parallel Processing Machines --- p.2 / Chapter 1.1.1 --- Neural Networks --- p.5 / Chapter 1.2 --- Parallel Processing in the Continuous-Time Domain --- p.6 / Chapter 1.3 --- Binary Relation Inference Network --- p.10 / Chapter 2 --- Binary Relation Inference Network --- p.12 / Chapter 2.1 --- Binary Relation Inference Network --- p.12 / Chapter 2.1.1 --- Network Structure --- p.14 / Chapter 2.2 --- Shortest Path Problem --- p.17 / Chapter 2.2.1 --- Problem Statement --- p.17 / Chapter 2.2.2 --- A Binary Relation Inference Network Solution --- p.18 / Chapter 3 --- A Binary Relation Inference Network Prototype --- p.21 / Chapter 3.1 --- The Prototype --- p.22 / Chapter 3.1.1 --- The Network --- p.22 / Chapter 3.1.2 --- Computational Element --- p.22 / Chapter 3.1.3 --- Network Response Time --- p.27 / Chapter 3.2 --- Improving Response --- p.29 / Chapter 3.2.1 --- Removing Feedback --- p.29 / Chapter 3.2.2 --- Selecting Minimum with Diodes --- p.30 / Chapter 3.3 --- Speeding Up the Network Response --- p.33 / Chapter 3.4 --- Conclusion --- p.35 / Chapter 4 --- VLSI Building Blocks --- p.36 / Chapter 4.1 --- The Site --- p.37 / Chapter 4.2 --- The Unit --- p.40 / Chapter 4.2.1 --- A Minimum Finding Circuit --- p.40 / Chapter 4.2.2 --- A Tri-state Comparator --- p.44 / Chapter 4.3 --- The Computational Element --- p.45 / Chapter 4.3.1 --- Network Performances --- p.46 / Chapter 4.4 --- Discussion --- p.47 / Chapter 5 --- A VLSI Chip --- p.48 / Chapter 5.1 --- Spatial Configuration --- p.49 / Chapter 5.2 --- Layout --- p.50 / Chapter 5.2.1 --- Computational Elements --- p.50 / Chapter 5.2.2 --- The Network --- p.52 / Chapter 5.2.3 --- I/O Requirements --- p.53 / Chapter 5.2.4 --- Optional Modules --- p.53 / Chapter 5.3 --- A Scalable Design --- p.54 / Chapter 6 --- The Inverse Shortest Paths Problem --- p.57 / Chapter 6.1 --- Problem Statement --- p.59 / Chapter 6.2 --- The Embedded Approach --- p.63 / Chapter 6.2.1 --- The Formulation --- p.63 / Chapter 6.2.2 --- The Algorithm --- p.65 / Chapter 6.3 --- Implementation Results --- p.66 / Chapter 6.4 --- Other Implementations --- p.67 / Chapter 6.4.1 --- Sequential Machine --- p.67 / Chapter 6.4.2 --- Parallel Machine --- p.68 / Chapter 6.5 --- Discussion --- p.68 / Chapter 7 --- Closed Semiring Optimization Circuits --- p.71 / Chapter 7.1 --- Transitive Closure Problem --- p.72 / Chapter 7.1.1 --- Problem Statement --- p.72 / Chapter 7.1.2 --- Inference Network Solutions --- p.73 / Chapter 7.2 --- Closed Semirings --- p.76 / Chapter 7.3 --- Closed Semirings and the Binary Relation Inference Network --- p.79 / Chapter 7.3.1 --- Minimum Spanning Tree --- p.80 / Chapter 7.3.2 --- VLSI Implementation --- p.84 / Chapter 7.4 --- Conclusion --- p.86 / Chapter 8 --- Conclusions --- p.87 / Chapter 8.1 --- Summary of Achievements --- p.87 / Chapter 8.2 --- Future Work --- p.89 / Chapter 8.2.1 --- VLSI Fabrication --- p.89 / Chapter 8.2.2 --- Network Robustness --- p.90 / Chapter 8.2.3 --- Inference Network Applications --- p.91 / Chapter 8.2.4 --- Architecture for the Bellman-Ford Algorithm --- p.91 / Bibliography --- p.92 / Appendices --- p.99 / Chapter A --- Detailed Schematic --- p.99 / Chapter A.1 --- Schematic of the Inference Network Structures --- p.99 / Chapter A.1.1 --- Unit with Self-Feedback --- p.99 / Chapter A.1.2 --- Unit with Self-Feedback Removed --- p.100 / Chapter A.1.3 --- Unit with a Compact Minimizer --- p.100 / Chapter A.1.4 --- Network Modules --- p.100 / Chapter A.2 --- Inference Network Interface Circuits --- p.100 / Chapter B --- Circuit Simulation and Layout Tools --- p.107 / Chapter B.1 --- Circuit Simulation --- p.107 / Chapter B.2 --- VLSI Circuit Design --- p.110 / Chapter B.3 --- VLSI Circuit Layout --- p.111 / Chapter C --- The Conjugate-Gradient Descent Algorithm --- p.113 / Chapter D --- Shortest Path Problem on MasPar --- p.115

Thesis (M.S.)--University of Texas at El Paso, 2009. / Title from title screen. Vita. CD-ROM. Includes bibliographical references. Also available online.