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1	Radiation Hardened Pulse Based D Flip Flop Design January 2014 (has links) abstract: ABSTRACT The D flip flop acts as a sequencing element while designing any pipelined system. Radiation Hardening by Design (RHBD) allows hardened circuits to be fabricated on commercially available CMOS manufacturing process. Recently, single event transients (SET's) have become as important as single event upset (SEU) in radiation hardened high speed digital designs. A novel temporal pulse based RHBD flip-flop design is presented. Temporally delayed pulses produced by a radiation hardened pulse generator design samples the data in three redundant pulse latches. The proposed RHBD flip-flop has been statistically designed and fabricated on 90 nm TSMC LP process. Detailed simulations of the flip-flop operation in both normal and radiation environments are presented. Spatial separation of critical nodes for the physical design of the flip-flop is carried out for mitigating multi-node charge collection upsets. The proposed flip-flop is also used in commercial CAD flows for high performance chip designs. The proposed flip-flop is used in the design and auto-place-route (APR) of an advanced encryption system and the metrics analyzed. / Dissertation/Thesis / M.S. Electrical Engineering 2014 Electrical engineering ciruits D Flip Flop pulse Radiation hardened
2	Design of Ultra-Compact and Low-Power sub-10 Nanometer Logic Circuits with Schottky Barrier Contacts and Gate Work-Function Engineering Canan, Talha Furkan 23 May 2022 (has links) No description available. Electrical Engineering Computer Science Condensed Matter Physics Schottky Barrier FinFETs Schottky Barrier tunneling gate workfunction engineering ambipolar current sub-10nm CMOS design digital logic double gate MOSFET 3T XOR gate 8T full adder 6T 4x1 multiplexer 6T D flip flop 2T 4-Input NAND 2T 4-Input NOR 8T JK flip flop fine-grain reconfigurability digital reconfigurable circuits 26T 1-bit ALU

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Radiation Hardened Pulse Based D Flip Flop Design

Design of Ultra-Compact and Low-Power sub-10 Nanometer Logic Circuits with Schottky Barrier Contacts and Gate Work-Function Engineering