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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Hierarchical timing verification and delay fault testing /

Jayabharathi, Rathish, January 1999 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 146-158). Available also in a digital version from Dissertation Abstracts.
2

Reconvergent fanout analysis of bounded gate delay faults

Grimes, Hillary, Agrawal, Vishwani D., January 2008 (has links) (PDF)
Thesis (M.S.)--Auburn University, 2008. / Abstract. Vita. Includes bibliographical references (p. 49-53).
3

Delay-oriented reliable communication and coordination in wireless sensor-actuator networks. / CUHK electronic theses & dissertations collection

January 2007 (has links)
Finally, we present a novel algorithm for intruder detection in a sinkhole attack of wireless sensor network. The algorithm can identify the intruder and deal with multiple malicious nodes effectively. We have evaluated the performance of the proposed algorithm through both numerical analysis and simulations, which confirmed the effectiveness and accuracy of our algorithm. / In this thesis, we propose a general reliability-centric framework for event reporting in WSANs. We point out that the reliability in such a real-time system depends not only on the accuracy, but also the importance and freshness of the reported data. Our proposed design thus integrates three key modules, (1) an efficient and fault-tolerant event data aggregation algorithm, (2) a delay-aware data transmission protocol, and (3) an adaptive actuator allocation algorithm for unevenly distributed events. We further propose a latency-oriented fault tolerant data transport protocol (LOFT) and a power-controlled real-time data transport protocol (POWER-SPEED) for WSANs. LOFT balances the workload of sensors by checking their queue utilization and handles node/link failures by an adaptive replication algorithm. POWER-SPEED transmits packets in an energy-efficient manner while maintaining soft real-time packet transport. We evaluate our framework and the two proposed protocols through extensive simulations, and the results demonstrate that they achieve the desirable reliability for WSANs. / To minimize the data collection time, we propose a new routing design. We present the mathematical formulation of the route design problem, and show that it is computationally intractable. We then propose two practical algorithms to reduce the delay of the sensors. Our algorithms adaptively adjust the actuator visiting frequencies to the sensors according to their relative weights and data generation patterns. We further propose a probabilistic route design (PROUD) algorithm which adapts to network dynamics. We present the distributed implementation for PROUD and an extension which accommodates actuators with variable speeds. We also propose algorithms for load balancing among the actuators. Simulation results show that our algorithms can effectively reduce the overall data collection time. They adapt to the network dynamics and balances the energy consumption of the actuators. / Wireless sensor-actuator networks, or WSANs, greatly enhance the existing wireless sensor network architecture by introducing powerful and mobile actuators. These actuators are expected to work with the sensor nodes and perform much richer application-specific actions. For the applications which request for fast and accurate report of the environmental events, an efficient and reliable communication/coordination scheme is urged. Unfortunately, multi-hop communication in a WSAN is inherently unreliable due to frequent sensor failures and network partitions. Excessive delays, introduced by congestion or in-network data aggregation, further aggravate the problem. / Ngai, Cheuk Han. / "August 2007." / Adviser: Michael R. Lyu. / Source: Dissertation Abstracts International, Volume: 69-02, Section: B, page: 1113. / Thesis (Ph.D.)--Chinese University of Hong Kong, 2007. / Includes bibliographical references (p. 191-207). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. [Ann Arbor, MI] : ProQuest Information and Learning, [200-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract in English and Chinese. / School code: 1307.
4

Hierarchical fault collapsing for logic circuits

Sandireddy, Raja Kiran Kumar Reddy. Agrawal, Vishwani D., January 2005 (has links) (PDF)
Thesis(M.S.)--Auburn University, 2005. / Abstract. Vita. Includes bibliographic references (p.68-73).
5

Delay Test Scan Flip-Flop c(DTSFF) design and its applications for scan based delay testing

Xu, Gefu, Singh, Adit D. January 2007 (has links) (PDF)
Dissertation (Ph.D.)--Auburn University, 2007. / Abstract. Vita. Includes bibliographic references (p.107-111).
6

Efficient and accurate gate sizing with piecewise convex delay models /

Tennakoon, Hiran Kasturiratne. January 2005 (has links)
Thesis (Ph. D.)--University of Washington, 2005. / Vita. Includes bibliographical references (leaves 59-60).

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