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Typescript (photocopy). / Digitized by Kansas Correctional Industries

published_or_final_version / abstract / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

A general schematic method is developed for modeling the fundamental parameters of vacuum integrated circuits (VIC's), a new class of microelectronics devices. A summary of the history of thermionic integrated circuits (TIC's) is presented, along with a discussion of the heater and its effect on device performance. The effects of the base metal on the emission properties of cathodes which are a mixture of the emission carbonates and negative photo-resist are also considered. The amplification factor is determined by using either a first or second order model depending on the desired degree of accuracy. The transconductance and anode resistance may be calculated as well by using the perveance model of cathode current. The voltage scaling factor used in the design of small voltage operating devices is applied to the analysis of planar devices. Electrostatic interactions between devices are important in the design of vacuum integrated circuits. The percent interaction function is used to quantify the effects of DC and small signal electrostatic interactions. The effect of work function differences on the DC biasing of circuits is also considered. The pseudo-radial electrostatic (PREF) lens is used to direct the electrons in a quasi-circular orbit from cathode to anode. The PREF lens is utilized in designing a series of planar devices including current source, triode (diode), enhancement-mode and depletion-mode type devices. The theory and experimentally determined characteristics of these devices are presented in detail.

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Single crystal silicon solar cells for use under high concentration sunlight presently exhibit the highest conversion efficiencies. The following paper represents further work done to improve the efficiency of crystalline silicon solar cells through improved design. Design features and processing to address the loss mechanisms encountered in silicon solar cells are discussed. An improved solar cell structure has resulted from this work along with a practical processing sequence. Experiments were performed to show the practicality of pattern formation on the walls of the V-groove structures using conventional photolithography and masking techniques. Also, new beam processing techniques are discussed to improve processing.

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