The topic of this thesis presents a digital front end (DFE) of the digital video broadcasting over terrestrial (DVB-T). The DVB-T system is similar to most of the prior digital communication system. It is roughly divided into two major parts, one for channel coding/decoding, and the other for modulation/demodulation. The thesis is mainly focused on the DVB-T digital video broadcasting demodulation part of the receiver and the integration of a complete digital front demodulation system. The major operational processor of the DFE is a 2K/8K dual-mode FFT processor, which has been implemented by the TSMC ( Taiwan Semiconductor Manu-facturing Company ) 0.35um 2P4M CMOS process technology to justify the simulation results as well as the correctness of the proposed architecture.