This research aims to design a dual-conversion tuner RFIC for DVB-H applications with EDA tools. In order to have good understanding of the EDA tools used, both time-domain and frequency-domain simulation techniques are studied and discussed in this thesis. The designed tuner RFIC is implemented by a TSMC 0.35£gm SiGe BiCMOS process. The parasitic effects from PCB interconnects are also considered in this work. We use 3-D quasi-static EM simulation tool to extract the parasitic elements for PCB interconnects, and co-simulate these parasitic elements with RFICs using circuit simulation tool. The implemented tuner RFIC integrates most key components into a single chip, including the variable-gain low noise amplifier, up-converting mixer, intermediate-frequency amplifier, and down-converting mixer. Under QPSK modulation test, the designed tuner RFIC shows a wide dynamic range with good protection ratio. In addition, it has a low power consumption and thus is suitable for use in portable digital TV equipments.