Estimation of the fetal heart rate (FHR) has gained interest in the last century; low heart rate variability has been studied to identify intrauterine growth restricted fetuses (prepartum), and abnormal FHR patterns have been associated with fetal distress during delivery (intrapartum). Several monitoring techniques have been proposed for FHR estimation, including auscultation and Doppler ultrasound. This thesis focuses on the extraction of the non-invasive fetal electrocardiogram (NI-FECG) recorded from a limited set of abdominal sensors. The main challenge with NI-FECG extraction techniques is the low signal-to-noise ratio of the FECG signal on the abdominal mixture signal which consists of a dominant maternal ECG component, FECG and noise. However the NI-FECG offers many advantages over the alternative fetal monitoring techniques, the most important one being the opportunity to enable morphological analysis of the FECG which is vital for determining whether an observed FHR event is normal or pathological. In order to advance the field of NI-FECG signal processing, the development of standardised public databases and benchmarking of a number of published and novel algorithms was necessary. Databases were created depending on the application: FHR estimation with or without maternal chest lead reference or directed toward FECG morphology analysis. Moreover, a FECG simulator was developed in order to account for pathological cases or rare events which are often under-represented (or completely missing) in the existing databases. This simulator also serves as a tool for studying NI-FECG signal processing algorithms aimed at morphological analysis (which require underlying ground truth annotations). An accurate technique for the automatic estimation of the signal quality level was also developed, optimised and thoroughly tested on pathological cases. Such a technique is mandatory for any clinical applications of FECG analysis as an external confidence index of both the input signals and the analysis outputs. Finally, a Bayesian filtering approach was implemented in order to address the NI-FECG morphology analysis problem. It was shown, for the first time, that the NI-FECG can allow accurate estimation of the fetal QT interval, which opens the way for new clinical studies on the development of the fetus during the pregnancy.

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<p dir="ltr">Cardiac disease is one of the prominent reasons of deaths worldwide. The timely de-<br>tection of arrhythmias, one of the highly prevalent cardiac abnormalities, is very important<br>and promising for treatment. Electrocardiography (ECG) is well applied to probe the car-<br>diac dynamics, nevertheless, it is still challenging to robustly detect the arrhythmia with<br>automatic algorithms, especially when the noise may contaminate the signal to some extent.<br>In this research study, we have not only built and assessed different neural network models<br>to understand their capability in terms of ECE-based arrhythmia detection, but also com-<br>prehensively investigated the detection under different kinds of signal-to-noise ratio (SNR).<br>Both Long Short-Term Memory (LSTM) model and Multi-Layer Perception (MLP) model<br>have been developed in the study. Further, we have studied the necessity of fine-tuning<br>of the neural network models, which are pre-trained on other data and demonstrated that<br>it is very important to boost the performance when ECG is contaminated by noise. In<br>the experiments, the LSTM model achieves an accuracy of 99.0%, F1 score of 97.9%, and<br>high precision and recall, with the clean ECE signal. Further, in the high SNR scenario,<br>the LSTM maintains an attractive performance. With the low SNR scenario, though there<br>is some performance drop, the fine-tuning approach helps performance improvement criti-<br>cally. Overall, this study has built the neural network models, and investigated different<br>kinds of signal fidelity including clean, high-SNR, and low-SNR, towards robust arrhythmia<br>detection.</p>

Submitted by Cristiane Chim (cristiane.chim@ucpel.edu.br) on 2018-05-08T17:34:22Z No. of bitstreams: 1 Vagner Guidotti Furtado (1).pdf: 2942442 bytes, checksum: a43c18ecb28456284d4b6c622f11210d (MD5) / Made available in DSpace on 2018-05-08T17:34:22Z (GMT). No. of bitstreams: 1 Vagner Guidotti Furtado (1).pdf: 2942442 bytes, checksum: a43c18ecb28456284d4b6c622f11210d (MD5) Previous issue date: 2017-12-07 / The division operation in digital systems has its relevance because it is a necessary function in several applications, such as general purpose processors, digital signal processors and microcontrollers. The digital divider circuit is of great architectural complexity and may occupy a considerable area in the design of an integrated circuit, and as a consequence may have a great influence on the static and dynamic power dissipation of the circuit as a whole. In relation to the application of dividing circuits in circuits of the Digital Signal Processing (DSP) area, adaptive filters have a particular appeal, especially when using algorithms that perform a normalization in the input signals. In view of the above, this work focuses on the proposition of algorithms, techniques for reducing energy consumption and logical area, proposition and implementation of efficient dividing circuit architectures for use in adaptive filters. The Newton-Raphson and Goldschmidt iterative dividing circuits both operating at fixed-point were specifically addressed. The results of the synthesis of the implemented architectures of the divisors with the proposed algorithms and techniques showed considerable reduction of power and logical area of the circuits. In particular, the dividing circuits were applied in adaptive filter architectures based on the NLMS (Normalized least Mean Square) algorithm, seeking to add to these filters, characteristics of good convergence speed, combined with the improvement in energy efficiency. The adaptive filters implemented are used in the case study of harmonic cancellation on electrocardiogram signals / A operação de divisão em sistemas digitais tem sua relevância por se tratar de uma função necessária em diversas aplicações, tais como processadores de propósito geral, processadores digitais de sinais e microcontroladores. O circuito divisor digital é de grande complexidade arquitetural, podendo ocupar uma área considerável no projeto de um circuito integrado, e por consequência pode ter uma grande influência na dissipação de potência estática e dinâmica do circuito como um todo. Em relação à aplicação de circuitos divisores em circuitos da área DSP (Digital Signal Processing), os filtros adaptativos têm um particular apelo, principalmente quando são utilizados algoritmos que realizam uma normalização nos sinais de entrada. Diante do exposto, este trabalho foca na proposição de algoritmos, técnicas de redução de consumo de energia e área lógica, proposição e implementação de arquiteturas de circuitos divisores eficientes para utilização em filtros adaptativos. Foram abordados em específico os circuitos divisores iterativos Newton-Raphson e Goldschmidt ambos operando em ponto-fixo. Os resultados da síntese das arquiteturas implementadas dos divisores com os algoritmos e técnicas propostas mostraram considerável redução de potência e área lógica dos circuitos. Em particular, os circuitos divisores foram aplicados em arquiteturas de filtros adaptativos baseadas no algoritmo NLMS (Normalized least Mean Square), buscando agregar a esses filtros, características de boa velocidade de convergência, aliada à melhoria na eficiência energética. Os filtros adaptativos implementados são utilizados no estudo de caso de cancelamento de harmônicas em sinais de eletrocardiograma (ECG)