abstract: Isolated DC/DC converters are used to provide electrical isolation between two supply domain systems. A fully integrated isolated DC/DC converter having no board-level components and fabricated using standard integrated circuits (IC) process is highly desirable in order to increase the system reliability and reduce costs. The isolation between the low-voltage side and high-voltage side of the converter is realized by a transformer that transfers energy while blocking the DC loop. The resonant mode power oscillator is used to enable high efficiency power transfer. The on-chip transformer is expected to have high coil inductance, high quality factors and high coupling coefficient to reduce the loss in the oscillation. The performance of a transformer is highly dependent on the vertical structure, horizontal geometry and other indispensable structures that make it compatible with the IC process such as metal fills and patterned ground shield (PGS). With the help of three-dimensional (3-D) electro-magnetic (EM) simulation software, the 3-D transformer model is simulated and the simulation result is got with high accuracy. In this thesis an on-chip transformer for a fully integrated DC/DC converter using standard IC process is developed. Different types of transformers are modeled and simulated in HFSS. The performances are compared to select the optimum design. The effects of the additional structures including PGS and metal fills are also simulated. The transformer is tested with a network analyzer and the testing results show a good consistency with the simulation results when taking the chip traces, printed circuit board (PCB) traces, bond wires and SMA connectors into account. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2014

<p>The recent FDA regulatory clearance for the 7 tesla Magnetic Resonance Imaging (MRI) system has led to increased interest in clinical ultra-high field (UHF) applications. However, to robustly achieve the expected increase in signal-to-noise ratio (SNR) at UHF, the radiofrequency (RF) challenges need to be met, namely, problems with higher RF power, worse <i>B₁⁺</i> inhomogeneity (signal voids) and increased tissue dielectric properties at higher frequency, all of which usually results in increased specific absorption rate (SAR). The parallel transmission (pTx) techniques are generally accepted as a realistic solution, providing improvement in the <i>B₁⁺</i> homogeneity with good RF efficiency while reducing peak local SAR. We designed a hybrid circuit-spatial domain optimization to accelerate the design of a double row pTx head coil. The method predicted consistent coil scattering parameters, component values and <i>B₁⁺</i> field. RF shimming of the calculated field maps matched in vivo performance. To further increase the <i>B₁⁺</i> homogeneity in tissue, we added high dielectric material (HPM) pads near the coil, as the displacement currents in the HPM induced secondary <i>B₁⁺</i> in tissue. This raises a RF safety question of how to monitor millions of local SAR (complex valued Q-matrix) in the tissue voxels, for any weightings (forward voltages) applied to the pTx system. We implemented VOPs based on singular value decomposition to compress the Q-matrices with a compression ratio >100, effectively monitoring the maximum peak local SAR values at given weighting amplitudes.</p>

Les TBH SiGe sont parmi les composants les plus rapides et sont utilisés pour les applications millimétriques. Des systèmes fonctionnent à 820GHz avec ces composants ont été déjà mis en œuvre. Afin de concevoir des circuits fonctionnant à ces fréquences très élevées, une analyse détaillée du comportement intrinsèque doit être effectuée. L’objectif principal de cette thèse est la caractérisation de la partie intrinsèque de ces composants. Une bonne précision de mesure dans la gamme de fréquences ondes millimétriques représente un vrai challenge, puisque les grandeurs intrinsèques du dispositifs ont beaucoup plus faibles que les données brutes de mesure auxquelles est associée la partie extrinsèque du composant. Afin de corriger la partie extrinsèque, des techniques de de-embedding spécifiques sont mises au point pour obtenir ces caractéristiques intrinsèques réelles. De plus, une technique de calibration directement sur la puce, sans utiliser de calkit, a été élaborée. Ceci permet de s’affranchir des effets de couplage entre la surface du standard de calibrage et les pointes de test hyperfréquences. L’ensemble a été validé par des simulations de type électromagnétique. / SiGe HBTs have proven their capability to support large bandwidth and high data ratesfor high-speed communication systems. Systems operating at 820GHz with these componentshave already been implemented. To design circuits operating at high frequencies, adetailed analysis of the intrinsic behavior should be performed. The main objective of thisthesis is the characterization of the intrinsic part of these components. Good accuracy inthe millimeter wave frequency range represents a real challenge, since the intrinsic deviceparameters are much lower than the raw data measurement that is associated with theextrinsic part of the component. However, existing on-wafer de-embedding techniquesare known to be inadequate to remove completely the parasitic effects and to get thereal intrinsic characteristics. In addition, an on-wafer calibration technique has beendeveloped. This overcomes the effects of coupling between the surface of the standard calibrationand RF probe tips. The set has been validated by an electromagnetic simulation.

Passive components are indispensable in the design and development of microchips for high-frequency applications. Inductors in particular are used frequently in radio frequency (RF) IC's such as low-noise amplifiers and oscillators. High performance inductor has become one of the critical components for voltage controlled oscillator (VCO) design, for its quality factor (Q) value directly affects the VCO phase noise. The optimization of inductor layout can improve its performance, but the improvement is limited by selected technology. Inductor performance is bounded by the thin routing metal and small distance from lossy substrate. On the other hand, the in-accurate inductor modeling further limits the optimization process. The on-chip inductor has been an important research topic since it was first proposed in early 1990's. Significant amount of study has been accomplished and reported in literature; whereas some methods have been used in industry, but not released to public. It is of no doubt that a comprehensive solution is not exist yet. A comprehensive study of previous will be first address. Later author will point out the in-adequacy of skin effect and proximity effect as cause of current crowding in the inductor metal. A model method embedded with new explanation of current crowding is proposed and its applicability in differential inductor and balun is validated. This study leads to a robust optimization routine to improve inductor performance without any addition technology cost and development.

This master’s thesis deals with modelling of the planar coupling circuits, namely type of the wideband couplers and the ultra-wideband couplers. The purpose of this thesis is an analysis, a synthesis, a numerical modelling and a fabrication (only chosen types) of the presented couplers. All of the couplers works on medium frequency f0 = 7 GHz with coupling C = 3 dB. Types of the substrate are Arlon 25N and Arlon AD600. EM simulator IE3D and circuit simulator in program Ansoft Designer are used for the numerical modelling. The realized wideband couplers were measuring by the vector analyzer Agilent E3864B.