Global ETD Search

1	A two level model for digital system fault diagnosis McPherson, John A. January 1977 (has links) Thesis (M.S.)--University of Wisconsin--Madison, 1977. / eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 135-136). Electric fault location.
2	Transient fault detection using a watchdog processor / Becker, Brian Alan, January 1993 (has links) Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1993. / Vita. Abstract. Includes bibliographical references (leaves 86-87). Also available via the Internet.
3	Multiple fault coverage capability of single fault detection test sets Fung, Andy Shiu-Fai. January 1983 (has links) No description available.
4	Support vector machines and wavelet packet analysis for fault detection and identification Ortiz, Estefan M January 2006 (has links) Thesis (M.S.)--University of Hawaii at Manoa, 2006. / Includes bibliographical references (leaves 60-62). / ix, 62 leaves, bound ill. 29 cm
5	Fault simulation and test pattern generation for synchronous and asynchronous sequential circuits / Lee, Hyung Ki, January 1993 (has links) Thesis (Ph. D.)--Virginia Polytechnic Institute and State University, 1993. / Vita. Abstract. Includes bibliographical references (leaves 1778-181). Also available via the Internet.
6	Single phase earth faults in high impedance grounded networks : characteristics, indication and location / Hänninen, Seppo. January 2001 (has links) (PDF) Thesis (doctoral)--Helsinki University of Technology, 2001. / Includes bibliographical references. Also available on the World Wide Web.
7	Diagnosis and self-diagnosis of digital systems Holt, Craig Sheppard. January 1981 (has links) Thesis (Ph. D.)--University of Wisconsin--Madison, 1981. / Typescript. Vita. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 239-245).
8	Multiple fault coverage capability of single fault detection test sets Fung, Andy Shiu-Fai. January 1983 (has links) No description available.
9	Synchronous fault simulation by surrogate with exceptions. Wang, Xiaolin. January 1989 (has links) The contribution of this dissertation is the development of a completely new and accurate algorithm SFSSE for synchronous fault simulation of sequential circuits. The distinctive difference between SFSSE (Synchronous Fault Simulation by Surrogate with Exceptions) and similar approaches for fault simulation in combinational logic circuits is that SFSSE is capable of handling faults stored in more than one memory elements and the reconvergence over time of the stored fault effect with the original fault. The experimental result shows a significant improvement for SFSSE by comparing its execution time to that of parallel fault simulation. After a stored fault list is established during one clock period, all paths from the output of that memory element to the primary outputs might be blocked in subsequent clock periods. A fault is usually propagated through many paths in various subnetworks over several clock periods, and it is detected when only one of these paths reaches a primary output. A new idea for efficiency is suggested in the last chapter to avoid the unproductive simulation activity. In that approach the waste of simulation time is avoided by overlapping the simulation of multiple clock periods. Electric fault location. Integrated circuits. Computer simulation.
10	Fault isolation and diagnosis techniques for mixed-signal circuits Cherubal, Sasikumar 05 1900 (has links) No description available. Mixed signal circuits Testing Electric fault location

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