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Steady state analysis, design and comparison of third order parallel resonant convertersYacoub, Abdelbassit 01 April 2001 (has links)
No description available.
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Single-stage single-switch power factor correction circuits : analysis, design and implementationWei, Huai 01 January 1999 (has links)
No description available.
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Evaluation of family of soft-switching DC-to DC PWM convertersEl Filali, Faouzi 01 January 1998 (has links)
No description available.
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Front-end converter design and system integration techniques in distributed power systemsLuo, Shiguo 01 July 2001 (has links)
No description available.
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Dynamic modeling of power converters using a unified approachIannello, Christopher J. 01 January 1999 (has links)
No description available.
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Flyboost derived single stage power factor correction converterQiu, Weihong 01 July 2003 (has links)
No description available.
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Circuit averaging in high-frequency power factor correction convertersSoundalgekar, Manasi A. 01 October 2001 (has links)
No description available.
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Steady state analysis of soft-switching DC-DC and magamp forward convertersAlsharqawi, Abdelhalim M. 01 July 2002 (has links)
No description available.
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Constant-frequency, clamped-mode resonant convertersTsai, Fu-Sheng January 1989 (has links)
Two novel clamped-mode resonant converters are analyzed. These clamped-mode converters operate at a constant frequency while retaining many desired features of conventional resonant converters such as fast responses, zero-voltage turn-on or zero-current turn-off, and low EMI levels, etc. The converters are able to regulate the output from no load to full load and are particularly suitable for off-line, high-power applications.
To provide insights to the operations and derive design guidelines for the clamped-mode resonant converters, a complete dc characterization of both the clamped-mode series-resonant converter and the clamped-mode parallel-resonant converter, operating above and below resonant frequency, is performed. State-plane analysis techniques are employed. By portraying the converters' operation on a state-plane diagram, various circuit operating modes are identified. The boundaries between different operating modes are determined. The regions for natural and force commutation of the active switches are defined. Important dc characteristics, such as control-to-output transfer ratio, rms inductor current, peak capacitor voltage, rms switch currents, average diode currents, switch turn-on currents, and switch turn-off currents are derived to facilitate the converter designs.
To illustrate the converter designs in different operating regions, several design examples are given. Finally, three prototype circuits are built to verify the analytical results. / Ph. D.
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Manhattan Converter Family: Partial Power Processing, Module Stacking with Linear Complexity, Efficiency and Power Density, in DC and AC ApplicationsJahnes, Matthew January 2024 (has links)
A modularized three-dimensional power electronics environment will become increasingly necessary as power converters are more intertwined with the dynamic desires of modern society. This is driven by ever-changing requirements, combined with the desire for quick design cycles, and then further compounded by the increased penetration of electrified technologies. The high demand for various power converters presents a design, manufacturing, and validation burden which can be lessened with a three-dimensional power electronics environment, where power converters of any arbitrary set of voltage, current, or quantity of independent input/outpt requirements can be assembled from a grouping of pre-existing converter modules. This, however, has drawbacks when compared with bespoke power converter designs. Modularization can be complex, lossy, and large, and the resulting converter's overall efficiency and power density will then suffer. To compensate for these costs of modularization, the individual modules must be first be power dense and efficient, and then the framework for grouping modules together must be simple.
This dissertation first proposes a high performance Power Conversion Unit (PCU) which is achieved through a unique combination of techniques. The first of these techniques is modification to the ubiqutioius buck converter topology in a form of an adjustment to its output filter. This topological modification results in decreased current ripple handling requirements of the filter, which can be used to reduce its volume. The second topological technique is an additional capacitance placed across the drain-source terminals of each FET, which is used to reduce their turn-off switching energy at the expense of their turn-on switching energy. A variable frequency soft-switching scheme is utitlized to prevent the converter from incurring turn-on losses, and a duty cycle compensation scheme is developed to mitigate the distortions caused by this increased drain-source capacitance. Finally, a process for balancing the PCU design parameters that results in a Pareto frontier of efficiency-power density optimal points is defined, one selected, and a protoype PCU constructed and tested in a three-phase inverter configuration.
A framework for the vertical stacking of PCUs is then shown. This framework, named the Manhattan Topology, is a multilevel power converter topology which is defined by a set of series stacked capacitances where there exists a method to transfer power between capacitances. This framework has linear complexity and switching device stress scaling with the number of levels, which yields a simple methodology for grouping modules together in the vertical dimension. Furthermore, it exhibits Partial Power Processing (PPP) characteristics as the power processed internally to the overall converter is less than its output power. This framework is validated for both DC/DC and AC/DC applications and control and conversion of voltages greater than the rating of any individual component within the converter is experimentally demonstrated. Lastly, another three-phase inverter is built using this topological framework and the performance of this vertically-modularized inverter is compared with the non-modularized inverter. It is shown that the three-dimensional modular power electronics environment with optimized PCUs, despite the costs of modularization, is still performance-competitive with the non-modular power electronics environment.
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