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Leakage power modeling and reduction techniques for nanometer scale VLSI circuits /Au, Yi-ching. January 2004 (has links)
Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2004. / Includes bibliographical references (leaves 59-61). Also available in electronic version. Access restricted to campus users.
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Gate-to-channel parasitic capacitance minimization and source-drain leakage evaluation in germanium PMOS /Krom, Raymond T. January 2008 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 2008. / Typescript. Includes bibliographical references.
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