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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
251

A Multi-gigabit CMOS Transceiver with 2x Oversampling Linear Phase Detection

Vichienchom, Kasin 24 February 2003 (has links)
This dissertation presents the design of a high-speed CMOS transceiver for serial digital data. The design is based on a parallel architecture data recovery circuit. It uses multiple clock phases from a multi-phase phase-locked loop (MPLL) operating at low frequency to sample high frequency input data in a time-interleaved manner. This results in the reduction of the speed requirement for the transceiver. The new technique of time-interleaved sampling is realized by placing the analog and digital samplers alternately to sample the input data at a sampling rate of two times the data rate (2x). This hybrid parallel sampling scheme provides the input phase error to the multi-phase PLL and simultaneously recovers and deserializes the input data. The data phase detection generates the loop error signal that is proportional to the input phase error, therefore allowing the PLL to have a proportional loop control. This results in improvement of the loop stability, the output jitter, and the bit error rate over the conventional all-digital 2x oversampling, referred to as the bang-bang type phase detection. In addition, to investigate its operation closely, the model and analysis of the multi-phase PLL based on the discrete-time linear system has been developed. This model takes into account the sampling nature of the loop, which provides greater insight into the system behavior and an understanding of system constraints. The analysis shows that when the PLL loop bandwidth is much smaller than the input frequency, the system response can be approximated by the conventional continuous-time model and thus the number of phase detectors employed can be reduced. The model predicts the stability limit of the multi-phase PLL as a function of input frequency, loop bandwidth, and the number of phase detectors. In addition, the phase noise due to the bang-bang type phase detector in PLL-based clock recovery circuits has been analyzed using this model.
252

SOI for Frequency Synthesis in RF Integrated Circuits

Marks, Jeffery 01 May 2003 (has links)
MARKS, JEFFERY EARL. SOI for Frequency Synthesis in RF Integrated Circuits. (Under the direction of Dr. Wentai Liu.) <p> The purpose of this research has been to explore the use of the Honeywell silicon on insulator fabrication process for use in a frequency synthesizer. The research includes the fabrication of a frequency synthesizer and ring oscillators which are used to evaluate the fabrication process. Experimental results are compared to the theoretical results, providing some insight into circuit design with the silicon on insulator process. Recommendations are presented to enhance the frequency stability of such circuits. A novel method for reducing phase noise in ring oscillators through manipulation of the floating body is also presented. </p>
253

Reconstruction of Lambertian Surfaces from Photometric Stereo

Sethuram, Amrutha Shree 15 March 2005 (has links)
The objective of this thesis is to implement and compare two algorithms to reconstruct the shape of an object from photometric stereo. Photometric stereo is a practical technique for determining an object?s shape and surface reflectance properties at a distance. The implementation proposes the use of three images of an object, recorded from the same viewpoint but with different illumination. The first algorithm employs the Fourier transform method to solve the minimization problem. The gradient data is obtained by incorporating photometric stereo method on image triplets. The Fourier transform of the unknown surface is then expressed as a function of the Fourier transform of the gradients. The relative depth values are then obtained by applying an inverse Fourier transform of the function. The second algorithm is based on iterative reconstruction which minimizes the cost function by gradient descent and annealing. Both these algorithms are implemented to reconstruct both real and synthetic surfaces and the results are compared. It is also shown that better reconstruction results are obtained by adopting the second algorithm in the presence of discontinuities in the image. Noise sensitivity of the frequency-domain method is also evaluated. An experimental setup to obtain real world images is also presented.
254

Design of Autonomous Navigation Controllers for Unmanned Aerial Vehicles Using Multi-objective Genetic Programming

Barlow, Gregory John 23 March 2004 (has links)
Unmanned aerial vehicles (UAVs) have become increasingly popular for many applications, including search and rescue, surveillance, and electronic warfare, but almost all UAVs are controlled remotely by humans. Methods of control must be developed before UAVs can become truly autonomous. While the field of evolutionary robotics (ER) has made strides in using evolutionary computation (EC) to develop controllers for wheeled mobile robots, little attention has been paid to applying EC to UAV control. EC is an attractive method for developing UAV controllers because it allows the human designer to specify the set of high level goals that are to be solved by artificial evolution. In this research, autonomous navigation controllers were developed using multi-objective genetic programming (GP) for fixed wing UAV applications. Four behavioral fitness functions were derived from flight simulations. Multi-objective GP used these fitness functions to evolve controllers that were able to locate an electromagnetic energy source, to navigate the UAV to that source efficiently using on-board sensor measurements, and to circle around the emitter. Controllers were evolved in simulation. To narrow the gap between simulated and real controllers, the simulation environment employed noisy radar signals and a sensor model with realistic inaccuracies. All computations were performed on a 92-processor Beowulf cluster parallel computer. To gauge the success of evolution, baseline fitness values for a successful controller were established by selecting values for a minimally successful controller. Two sets of experiments were performed, the first evolving controllers directly from random initial populations, the second using incremental evolution. In each set of experiments, autonomous navigation controllers were evolved for a variety of radar types. Both the direct evolution and incremental evolution experiments were able to evolve controllers that performed acceptably. However, incremental evolution vastly increased the success rate of incremental evolution over direct evolution. The final incremental evolution experiment on the most complex radar investigated in this research evolved controllers that were able to handle all of the radar types. Evolved UAV controllers were successfully transferred to a wheeled mobile robot. An acoustic array on-board the mobile robot replaced the radar sensor, and a speaker emitting a tone was used as the target. Using the evolved navigation controllers, the mobile robot moved to the speaker and circled around it. Future research will include testing the best evolved controllers by using them to fly real UAVs.
255

Microwave Power Oscillator utilizing Thin-Film Varactor

Victor, Alan M 30 March 2010 (has links)
Synthesis of Microwave Power Oscillators utilizing Thin-film Varactors. The application of the power oscillator is in high efficiency microwave sources for the direct carrier launch of microwave signals. The resulting work directing towards the efficient implementation for microwave transmitters.
256

Design Flow Based on Sensitivity Analysis for High-speed Digital Circuits

Morgan, Andrew Stacy 08 April 2004 (has links)
The purpose of this work is to develop a design flow for high-speed digital circuits that may be used to increase the quality of circuit performance and improve the ability of inexperienced circuit designers. This design flow meshes the use of hand and simulation analysis to increase intuitive understanding of the dominant relationships and most significant circuit parameters that determine performance. The research relies heavily on determining the sensitivity of chosen performance measures to variation in selected circuit parameters, such as transistor gate width. Four detailed examples that follow the generalized design flow are included to illustrate practical application. The examples consist of the following circuits: source-follower, gate-isolated voltage sense-amplifier, Schmidt trigger, and dual-rail domino logic gate. The examples include design specifications, topology advantages and disadvantages, a suggested design approach, and detailed sensitivity analysis including quantitative simulation results supporting drawn conclusions.
257

Design of a Flexible DSP Based Controller Hardware System for Power Electronics Applications

Godbole, Rahul Pushpak 28 April 2008 (has links)
This thesis proposes the concept of a universal controller hardware system for power electronics applications. With the presence of generic interfaces and communication schemes, this system can be used in various other control scenarios. A prototype hardware system incorporating a high performance floating point digital signal processor (DSP) and a powerful field programmable gate array (FPGA) has been built to demonstrate the concept of real-time hardware simulation. Prior to being deployed for control of a complete power electronics system, an intermediate step that would yield more information pertaining to system timing is the hardware simulation enabled by such a board. Extracting maximum throughput from this system with a few innovative schemes has been another goal of this project. In order to achieve this objective, the embedded peripherals of the Texas Instruments C6000 series DSP have been programmed to facilitate a higher degree of parallelism. The core of this thesis deals with the different sub-systems that comprise the real-time controller (RTC) board, and their interaction with one another. One of the novel schemes proposed in this thesis involves the on-board communication between the DSP and several analog-to-digital converter (ADC) chips using the multi-channel audio serial port (McASP) peripheral. The efficacy of this concept is made possible by robust software architecture, enabled by the enhanced direct memory access (EDMA) peripheral. In addition to the DSP peripheral activity, significant processing capability is offered by the Cyclone II series FPGA. The option of universal connectivity is provided over either Ethernet or USB. The FPGA also provides a platform for developing a complete system with an embedded 32-bit processor. The RTC board prototype can be used for power electronics applications with the addition of certain interface boards, which can be readily developed.
258

Thermal Transfer in Semiconductor Nano Structures

Kong, Byoung-Don 28 April 2010 (has links)
We present the results of theoretical investigation of thermal energy transfer in nanoscale semiconductors. The study mainly focuses on the newly discovered nano scale phenomena. First, we investigate near field thermal emission characteristics from semiconductors/vacuum interfaces with resonantly excited surface phonon polaritons and surface plasmon polaritons. All of the studied materials, InP, GaAs, GaN, SiC, and sapphire which support surface phonon polariton excitations, exhibit quasimonochromatic thermal emission symbolized by strong peaks of evanescent modes at well-defined frequencies in the near field that correspond to the appropriate peaks in the density of states for surface phonon polaritons. It is also found that the materials with lower polariton frequencies (e.g., InP and GaAs) generally demonstrate a higher peak spectral energy density compared to those with higher frequencies (e.g., SiC). This trend is maintained over the entire range of temperature (300-â600 K) and the distance from the surface (<10 um) considered in the calculation. The energy density stored in the evanescent peaks, when close to the surface, is estimated to be many orders of magnitude larger than that in the blackbody radiation. Surface plasmon polariton excitations are studied with n-doped GaAs, GaN, and Si. The study shows that the characteristic plasma and surface plasmon polariton resonant frequencies in the interval from 0.3 THz to 10 THz can be controlled with conventional doping densities. All considered demonstrate the spectral energy density in the near field that is several orders of magnitude larger than the blackbody radiation. The strongly resonant surface polariton excitations are also shown to enhance drastically the radiative heat transfer between two semi-infinite surfaces separated by nanometric distances. The possibility of extending spatially coherent emission through a 1-D binary grating is examined based on a rigorous coupled wave analysis. It is shown that spatially coherent thermal emission can be achieved using properly designed grating structures. Thermal emission properties are further investigated with more complex structures in one dimensional photonic crystals using Green's dyadic tensor and the concept of local electromagnetic density of states. The results show that high density near-field energy can be transfered via surface wave coupling across the one dimensional photonic crystals so it can be used as energy transfer mechanism without thermal and electric conduction. To explore future possibilities of active terahertz generation, the stimulated and spontaneous interactions were studied using photon-phonon interaction Hamiltonian and it is shown that there exist stimulated interactions. The energy transfer by the conduction mechanism is also studied with low dimensional crystal structures. We investigate the lattice thermal conductivity of ideal monolayer and bilayer graphene, using calculations from first principles. Our result estimates that the intrinsic thermal conductivity of both is around 2200 W/mK at 300 K, a value close to the one observed theoretically and experimentally in graphite along the basal plane. It also illustrates the expected 1/T dependence at higher temperatures. The minor variation between monolayer and bilayer thermal conductivity suggests that the number of layers may not affect significantly the in-plane thermal properties of these systems. The intrinsic thermal conductivity also appears to be nearly isotropic for graphene.
259

Compression and Transmission of Facial Images Over Very Narrowband Channels

Gunduz, Aysegul 14 April 2003 (has links)
Law enforcement officers on mobile duty are often confronted with ID authentication of subjects, requiring the transmission of a driver?s license picture over wireless channels with very narrow bandwidths. To access mug shots in a reliable and timely manner, real time compression and decompression methods with high compression ratios are required at the server database and at the mobile client unit. This thesis presents a methodology, which minimizes the size of the data sent over the channel by locally storing common features of the human face in the client computers. Pre-processing of server database images, such as facial feature extraction, are used to extract these common facial features, and are obtained via topological methods, in particular, via ravine extraction. The implemented file transfer protocols are based on basic TCP/IP client-server models and make use of socket programming. Experimental results show a 4x improvement in transfer time over typically saturated channels.
260

Active Body Bias for Low-Power Silicon-On-Insulator Design

Damiano, John 18 April 2006 (has links)
SOI device technology offers the circuit designer higher performance and greater flexibility. This work proposes the use of a targeted substrate bias and innovative device and circuit topologies to achieve higher performance and lower power while providing a strategy to compensate for wide temperature and process variations. This project introduces and evaluates a modified H-gate device topology (integrated drain-body transistor, or IDBT) vs. alternative structures using simulation supported by electrical results obtained from test circuits. The IDBT can be used to locally and dynamically reduce MOSFET VTH, increase switching speed, and improve circuit energy-delay product by up to 30%. For all structures investigated, the dynamic body bias provided by IDBTs provides improved logic cell performance vs. conventional source-tied cell designs. This work also examines use of body bias to compensate for temperature or process variations. The temperature range seen by space electronics exceeds standard commercial specs and even military specs. Integrated circuits placed on a satellite or lander vehicle may be expected to operate from below -200ºC to over 200ºC. In this environment, the stabilization of key circuit parameters across temperature, whether power consumption or performance metrics, can be accomplished through a targeted substrate bias. The amount of stabilization available, i.e. the degree to which key parameters can be shifted in-situ, is explored. Similarly, variations in device parameters due to process variations can also be compensated using this technique. Finally, these efforts exposed marginalities in the models for Honeywell MOI5 MOSFETs. At low temperatures, the simulated device characteristics diverged substantially from the electrical data, while the PMOS device simulation results displayed incorrect body factor. This work interprets these results and develops improved models based on electrical results from a series of test structures.

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