Parallel processing accelerates computations by solving a single problem using multiple compute nodes interconnected by a network. The scalability of a parallel system is limited by its ability to communicate and coordinate processing. Circuit switching, packet switching and wormhole routing are dominant switching techniques. Our simulation results show that wormhole routing and circuit switching each excel under different types of traffic. This dissertation presents a hybrid switching technique that combines wormhole routing with circuit switching in a single switch using vrtual channels and time division multiplexing. The performance of this hybrid switch is significantly impacted by the effciency of traffic scheduling and thus, this dissertation also explores the design and scalability of hardware scheduling for the hybrid switch. In particular, we introduce two schedulers for crossbar networks: a greedy scheduler and an optimal scheduler that improves upon the results provided by the greedy scheduler. For the time division multiplexing portion of the hybrid switch, this dissertation presents three allocation methods that combine wormhole switching with predictive circuit switching. We further extend this research from crossbar networks to fat tree interconnected networks with virtual channels. The global "level-wise" scheduling algorithm is presented and improves network utilization by 30% when compared to a switch-level algorithm. The performance of the hybrid switching is evaluated on a cycle accurate simulation framework that is also part of this dissertation research. Our experimental results demonstrate that the hybrid switch is capable of transferring both predictable traffics and unpredictable traffics successfully. By dynamically selecting the proper switching technique based on the type of communication traffic, the hybrid switch improves communication for most types of traffic.

Driving an electric powered wheelchair with a joystick is a complex task for the user who has a pathological tremor. Most powered wheelchairs use simple filtering algorithms to reduce the effects of tremor. These algorithms work well in most situations, but fall short in others. This study addresses the problems associated with pathological tremor associated with Cerebral Palsy (CP). The purpose of this study is to know more about the characteristics of CP tremor with time-frequency analysis and to improve joystick control with other advanced filtering algorithms. We used three estimated parameters, instantaneous frequency (IF), instantaneous bandwidth (IB), and instantaneous power (IP), from a time-frequency distribution (TFD), to characterize CP tremor and to tune a notch filter for canceling CP tremor noise from a joystick signal in an off-line experiment. From the off-line experiment, we showed that our CP tremor suppression system performed better with the information of IF, IB, and IP. We also conducted an on-line experiment in which we introduced two tremor suppression algorithms. One is Weighted-frequency Fourier Linear Combiner (WFLC), which estimates a tremor frequency and its weight, and the other is our modified WFLC, which adjusts a notch width with respect to the bandwidth of CP tremor additionally. We implemented both algorithms on the virtual wheelchair driving test along with a commonly used low-pass filter. We recruited ten subjects who have CP tremor and tested them in a virtual wheelchair driving environment. We observed that CP tremors in the joystick signal were suppressed greatly by the new filtering algorithms. We learned that the time-delay of a low-pass filter caused serious performance degradation of wheelchair driving and observed that most subjects performed better with new filtering methods than with a low-pass filter. Furthermore, since our modified WFLC algorithm was able to reduce more CP tremor noise than WFLC, we learned that it is important to consider the bandwidth information of CP tremor when designing a tremor suppression system.

A common approach to decreasing embedded application execution time is creating a homogeneous parallel processor architecture. The parallelism of any such architecture is limited to the number of instructions that can be scheduled in the same cycle. This number of instructions scheduled in a cycle, or instruction-level parallelism (ILP), is limited by the ability to extract parallelism from the application. Other techniques attempt to improve performance with hardware acceleration. Often, segments of highly computational extensive code are extracted and custom hardware is created to replace the software execution. This technique requires many resources and still does not address the segments of code outside of the computationally extensive kernel. To solve this problem, hardware acceleration for computationally intensive segments of code in addition to accelerating the entire application with very long instruction word, VLIW, techniques is proposed. (1) A compilation flow that targets a 4-wide VLIW processor architecture is presented. This system was used to investigate the available speed-up of VLIW architectures. The architecture was modified to combine the VLIW processor with the capability to execute application specific customized instructions. To create the custom instruction hardware, a control and data flow graph (CDFG) framework was created. The CDFG framework was created to provide a framework for compiler transformations and hardware generation. In order to remove control flow from segments of code selected for hardware generation, (2) the technique of hardware predication was developed. Hardware predication allows if-then and if-then-else control flow constructs to be transformed into strict data flow through the use of multiplexors. From the transformed CDFGs, (3) a VHDL generation pass was created that translates the compiler data structures into synthesizable VHDL. The resulting architecture contains the VLIW processor and tightly coupled application specific hardware. This architecture was analyzed for performance changes compared to the initial VLIW architecture, and a traditional processor. Lastly, (4) the architecture was analyzed for power and energy savings. A post static timing pass was added to the compilation flow for the insertion of hardware to delay early switching of operations. By measuring only the execution of the hardware function and comparing the performance to the equivalent code executed in software, a performance multiplier of up to 322 times is seen when synthesized onto an Altera Stratix II ES2S180F1508C4 FPGA. The average performance increase seen was 63 times faster. For the entire application, the speedup reached nearly 30X and was on average 12X better than a single processor implementation. The power and energy required by the VLIW processor core and the hardware functions for the computational kernels after 160nm OKI standard cell ASIC synthesis show a maximum power savings of 417 times that of execution on the processor with an average of 133 times savings in power consumption. With the increased execution time and the savings in power the energy savings will see a multiplicative effect. The energy improvement is therefore several orders of magnitude for the hardware functions, the savings range from over 1,000X to approximately 60,000X.

The new generation left ventricular assist devices (LVADs) for treating end-stage heart failure are based upon turbodynamic (rotary) pumps. These devices have demonstrated several advantages over the previous pulsatile generation of LVADs, however they have also proven more difficult to control. Limited availability of observable hemodynamic variables and dynamically changing circulatory parameters impose particular difficulties for the LVAD controller to accommodate the blood flow demands of an active patient. The heart rate (HR) and systemic vascular resistance (SVR) are two important indicators of blood flow requirement of the body; but these variables have not been previously well exploited for LVAD control. In this dissertation, we will exploit these two variables and develop a control algorithm, based upon mathematical models of the cardiovascular system: both healthy and diseased, with built in autoregulatory control (baroreflex). The controller will respond to change in physiological state by adjusting the pump flow based on changes in HR and SVR as dictated by the baroreflex.Specific emphasis will be placed on hemodynamic changes during exercise in which the blood flow requirement increases dramatically to satisfy the increased oxygen consumption. As the first step in the development of the algorithm, we developed a model which will include the autoregulation of the cardiovascular system and the hydraulic power input from the pump. This model provided a more realistic simulation of the interaction between the LVAD and the cardiovascular system regulated by the baroreflex. Then the control algorithm was developed,implemented, and tested on the combined system of the LVAD and the cardiovascular system including the baroreflex. The performance of the proposed control algorithm is examined by comparing it to other control methods in response to varying levels of exercise and adding noises to the hemodynamic variables. The simulation results demonstrate that the controller is able to generate more blood flow through the pump than the constant speed and constant pump head method, and the heart rate related pump speed method. The simulations with noise show that the controller is fairly robust to the measurement and estimate noises.

In-fiber Bragg gratings are key components for optical sensing. As embedded sensors, in-fiber gratings find important applications in mechanical structural health monitoring, vibration detection, pressure monitoring and acoustic sensing. However, the current state-of-the-art grating sensors inscribed in standard fiber only provide for the detection of stress and vibration in one dimension, along the axial dimension (length) of the fiber. In this thesis, we developed fiber Bragg grating sensors in specialty micro-structural fibers that can not only detect structural stress along the fiber, but also can detect stress along the transverse directions with high sensitivity. Finite element analysis (ANSYS) was used to design and study both longitudinal and transverse strain induced in microstructural fibers by external loads. Air holes were strategically placed in the fiber cladding to focus the external stress into the fiber cores to enhance the response of the fiber Bragg grating sensors. Stress-induced birefringence in the fiber core was studied in both standard and two-hole microstructural fibers with various air hole and fiber core configurations. Based on simulation studies, the optimal position to place the fiber core was determined to maximize the influence of transverse stress on the fiber cores. To validate the simulation results, Bragg grating sensors was inscribed in two-hole microstructure fibers for transverse stress sensing. Transverse stress, as measured by resonance peak splitting of the grating sensor, was used to compare with both predictions from simulation results. Both the simulation and measurement results indicate that the sensitivity of grating sensors to the transverse stress can be enhanced eight times more in a two-hole fiber than in a standard fiber.

The development of new wireless technologies, the improvement of existing ones and the reduction on the wireless devices prices is increasing the number of users, the demand for bandwidth and the demand for higher data rates. The spread of the technology however bring some drawbacks. One is the increasing interference level that can degrades the wireless communications. Many different techniques are used to minimize the interference and the effect of the channel (multipath, Doppler etc) in a wireless channel. This thesis considers the frequency and time processing of a jammer affected multi-carrier spread spectrum (MC-SS) system. A linear chirp is used as a spreading sequence. Such a sequence not only provides a constant envelope, but also allows the estimation of the channel parameters using a linear time-invariant model. Hence time-delays and Doppler frequency shifts can be represented by effective time shifts. The discrete evolutionary transform (DET) time-frequency repre- sentation is used for estimating the channel characteristics and for detecting jammers. Once the jammers are detected, the original spreading function corresponding to the jammed fre- quency is adapted to minimize the jammer effects. The bit detection is then performed using a least mean square (LMS) adaptive filter and it is done in both time- and frequency-domain. To illustrate the performance of the method, simulations with different signal to noise ratios, different jammer to signal ratios and different Doppler shifts were performed. The results indicate that the method is capable of excising the jammers providing a good bit error rate in low Doppler situations.

High speed inter-chip interconnects have reached and exceeded the multi-gigabit per second benchmark using differential signaling. Multi-bit differential signaling (MBDS) has been proposed as a solution to the 2n per n bit pin requirement of classical differential channels. MBDS does not currently have a modal characterization similar to the common and differential mode analysis developed for differential signaling that would allow a description of MBDS channel behavior. This thesis introduces a modal characterization of MBDS links via the development of modal scattering parameters that allow the analysis of the communications channel. Simulation results are presented in conjunction with data collected from a fabricated printed circuit board designed for MBDS links. Multiple printed circuit board layouts are be presented for analysis and design comparison. It is shown that the performance of MBDS links can be severely impacted by unoptimized PCB layout.

The channel capacity can be greatly increased by using multiple transmit and receive antennas, which is usually called multi-input multi-output (MIMO) systems. Iterative processing has achieved near-capacity on a single-antenna Gaussian or Rayleigh fading channel. How to use the iterative technique to exploit the capacity potential in single-user and/or multiuser MIMO systems is of great interest. We propose a low-density parity-check (LDPC) coded modulation scheme in multiuser MIMO systems. The receiver can be regarded as a serially concatenated iterative detection and decoding scheme, where the LDPC decoder performs the role of outer decoder and the multiuser demapper does that of the inner decoder. For the proposed scheme, appropriate selection of a bit-to-symbol mapping is crucial to achieve a good performance, so we investigate and find the best mapping under various cases. Analytical bound serves as a useful tool to assess system performance. The search for powerful codes has motivated the introduction of efficient bounding techniques tailored to some ensembles of codes. We then investigate combinatorial union bounding techniques for fast fading multiuser MIMO systems. The union upper bound on maximum likelihood (ML) decoding error probability provides a prediction for the system performance, with which the simulated system performance can be compared. Closed-form expression for the union bound is obtained, which can be evaluated efficiently by using a polynomial expansion. In addition, the constrained channel capacity and the threshold obtained from extrinsic information transfer (EXIT) chart can also serve as performance measures. Based on the analysis for fast fading case, we generalize the union upper bound to the block fading case.

We apply a Blind Source Separation BSS algorithm to the decorrelation of Mel-warped cepstra. The observed cepstra are modeled as a convolutive mixture of independent source cepstra. The algorithm aims to minimize a cross-spectral correlation at different lags to reconstruct the source cepstra. Results show that using "independent" cepstra as features leads to a reduction in the WER. Finally, we present three different enhancements to the BSS algorithm. We also present some results of these deviations of the original algorithm.

The use of liquid hydrogen as a fuel in both ground and in space requires low-cost multi-point sensing of hydrogen gas for leak detection well below the 4% explosion limit of hydrogen. In this thesis, we demonstrate an agile multi-functional active fiber optical hydrogen sensor for all temperature operations. Fiber-optical hydrogen sensors offer a number of advantages over other hydrogen sensor including explosive proof, low-cost, multiplexing, and capability of working in hostile environments. They are very suitable for mission-critical applications such as for hydrogen sensing and leak detection in aerospace vehicles. In this thesis, we demonstrate a multi-point, one-feed through, in-fiber hydrogen sensor capable of hydrogen detection below 0.5% concentration with a response time of less than 10 seconds. Our solution entails use of a fiber Bragg grating (FBG) coated with a layer of hydrogen-absorbing palladium which, in turn, induces strain in the FBG in the presence of hydrogen. The hydrogen-induced stress was detected by the shift of FBG wavelength. The responsivity of fiber optic hydrogen sensor was calibrated for hydrogen concentration from 0.1% to 10% and temperature range from -120oC to 120oC. The optimal sensitivity and response time of the sensor was found to be highly sensitivity to the temperature. The response due to the presence of hydrogen is imperceptible until the temperature reaches about -20oC. To develop a fiber-based hydrogen sensor for operation at all temperature, infrared power laser light carried by the same fiber containing FBG was used to induce localized heating in the palladium coating which dramatically decreases sensor response time and increases the sensors sensitivity at low temperatures. At -50oC localized heating yields 57% of sensitivity of that at room temperature. This technology promises an inexpensive fiber solution for a multi-point hydrogen detection array with only one fiber feed-through operation for all-temperature hydrogen sensing.