This thesis describes the development and application of statistical circuit simulation methodologies to analyse digital circuits subject to intrinsic parameter fluctuations. The specific nature of intrinsic parameter fluctuations are discussed, and we explain the crucial importance to the semiconductor industry of developing design tools which accurately account for their effects. Current work in the area is reviewed, and three important factors are made clear: any statistical circuit simulation methodology must be based on physically correct, predictive models of device variability; the statistical compact models describing device operation must be characterised for accurate transient analysis of circuits; analysis must be carried out on realistic circuit components. Improving on previous efforts in the field, we posit a statistical circuit simulation methodology which accounts for all three of these factors. The established 3-D Glasgow atomistic simulator is employed to predict electrical characteristics for devices aimed at digital circuit applications, with gate lengths from 35 nm to 13 nm. Using these electrical characteristics, extraction of BSIM4 compact models is carried out and their accuracy in performing transient analysis using SPICE is validated against well characterised mixed-mode TCAD simulation results for 35 nm devices. Static d.c. simulations are performed to test the methodology, and a useful analytic model to predict hard logic fault limitations on CMOS supply voltage scaling is derived as part of this work. Using our toolset, the effect of statistical variability introduced by random discrete dopants on the dynamic behaviour of inverters is studied in detail. As devices scaled, dynamic noise margin variation of an inverter is increased and higher output load or input slew rate improves the noise margins and its variation. Intrinsic delay variation based on CV/I delay metric is also compared using ION and IEFF definitions where the best estimate is obtained when considering ION and input transition time variations. Critical delay distribution of a path is also investigated where it is shown non-Gaussian. Finally, the impact of the cell input slew rate definition on the accuracy of the inverter cell timing characterisation in NLDM format is investigated.

In this thesis, the nature of asynchronous and synchronous torques in a split-phase induction machine is investigated and quantified. The equivalent circuit for this type of machine is derived using the rotating field theory. It is extended to include harmonic effects. Using this model, winding harmonics and permeance harmonics may be calculated independently of each other so that the model can be used to analyse asynchronous torques from winding harmonics as well as synchronous torques from permeance harmonics. These are calculated separately. The asynchronous torques appear as perturbations in the steady-state torque-speed curve while the synchronous torques only appear at specific speeds. The synchronous torques are superimposed onto the torque-speed curves to model both effects together. The model predictions are compared against test results using purpose-built experimental machines together with production machines. These have varying rotor bar number and skew. Different methods are used to assess the synchronous torques. It is found that measuring synchronous locking torque is not a straightforward matter; however, reasonable agreement is found between calculation and measurement. The work highlights the need for the correct choice of stator and rotor slot numbers together with the effect skew has on reducing the synchronous and asynchronous locking torques.

The scaling of conventional silicon based MOSFETs is increasingly difficult into the nanometer regime due to short channel effects, tunneling and subthreshold leakage current. Ultra-thin body silicon-on-insulator based architectures offer a promising alternative, alleviating these problems through their geometry. However, the transport behaviour in these devices is more complex, especially for silicon thicknesses below 10 nm, with enhancement from band splitting and volume inversion competing with scattering from phonons, Coulomb interactions, interface roughness and body thickness fluctuation. Here, the effect of the last scattering mechanism on the drive current is examined as it is considered a significant limitation to device performance for body thicknesses below 5 nm. A simulation technique that properly captures non-equilibrium transport, includes quantum effects and maintains computational efficiency is essential for the study of this scattering mechanism. Therefore, a 3D Monte Carlo simulator has been developed which includes this scattering effect in an ab initio fashion, and quantum corrections using the Density Gradient formalism. Monte Carlo simulations using `frozen field' approximation have been carried out to examine the dependence of mobility on silicon thickness in large, self averaging devices. This approximation is then used to carry out statistical studies of uniquely different devices to examine the variability of on-current. Finally, Monte Carlo simulations self consistent with Poisson's equation have been carried out to further investigate this mechanism.

In recent years, the use of encoded beads has received considerable attention due to their potential for measuring multiple analytes in solution.(1-4) This can be achieved without the need for knowledge of their spatial position, as in the case of microarray technology. Encoded bead technology also relies on the solution kinetics rather than diffusion to a fixed surface as in the case of microarray technology, offering the possibility of developing rapid high throughput screening methods. This thesis describes the production, characterisation and application of quantum dot encoded beads prepared using layer-by-layer assembly of different colour quantum dots around a magnetic bead. To achieve this, two different strategies were used to make “coloured” barcodes. The first strategy used thiol chemistry to immobilise quantum dots in a layer-by-layer assembly onto magnetic beads whereas the second strategy uses the interaction between quantum dot-biotin and quantum dot-streptavidin conjugates to create constructs on the magnetic bead surface. The development of both of these immobilisation strategies was characterisation using X-ray photoelectron spectroscopy and fluorescence spectroscopy of immobilised quantum dot structures onto a plain glass substrate. After the preparation of encoded beads, they were characterised using single bead fluorescence spectroscopy. It was found that attempts to prepare barcodes by layer-by-layer assembly of CdSe/ZnS quantum dots using thiol chemistry onto magnetic beads did not comply with the necessary barcode characteristics i.e., different colour coded beads could not be distinguished from each other. However, the encoded beads prepared using layer-by-layer assembly of quantum dot-biotin and quantum dot-streptavidin conjugates onto streptavidin coated magnetic beads gave distinct multicolour coded bead spectra. These barcodes were characterised in terms of different spectral responses, stability at raised temperatures, stability in biotin solutions, and long-term stability after storage. Encoded beads prepared using layer-by-layer assembly of quantum dot-biotin and quantum dot-streptavidin conjugates onto streptavidin coated magnetic beads were then used to develop multiplexed immunoassays. Four different barcodes were prepared and used to perform model multiplexed immunoassays. The barcodes were identified upon the basis of different spectral response measured using single bead fluorescence spectroscopy. Finally, a quantitative immunoassay for human IgG was performed using these barcodes, which showed that different concentrations of human IgG can be determined in solution.

In this thesis, monolithically integrated photonic devices for next generation optical telecommunications networks were investigated, namely semiconductor modelocked ring lasers and Mach-Zehnder interferometers operating at 1550 nm. Fabricated on the aluminium quaternary, the 2.3mm long passively mode-locked ring devices produced 1 ps pulses at a repetition rate of around 36GHz. It was found that the symmetrically placed dual saturable absorber configuration lead to the largest area of stable mode-locking, agreeing well with theoretical predictions in the literature. Optical harmonic injection mode-locking was found to improve the pulse timing stability, with a reduction in the radio frequency 3 dB linewidth from 1.4MHz down to 108 kHz, indicating a vast improvement in timing jitter. The sputtered SiO2 quantum-well intermixing technique allowed for the realisation of both symmetric and asymmetric arm length Mach-Zehnder interferometers, which were demonstrated as an electro-optic switch, tunable wavelength filter and optical code division multiple access encoder/decoder. The work concluded with the monolithic integration of a mode-locked ring laser and asymmetric Mach-Zehnder interferometer to demonstrate a simple, yet effective, photonic integrated circuit.

This research uses a SystemC design methodology to model and design complex wireless communication systems, because in the recent years, the complexity of wireless communication systems has increased and the modelling and design of such systems has become inefficient and challenging. The most important aspect of modelling wireless communication systems is that system design choices may affect the communication behaviour and also communication design choices may impact on the system design. Whilst, the SystemC modelling language shows great promise in the modelling of complex hardware/software systems, it still lacks a standard framework that supports modelling of wireless communication systems (particularly the use of wireless communication channels). SystemC lacks elements and components that can be used to express and simulate wireless systems. It does not support noise links natively. To fill this gap, this research proposes to extend the existing SystemC design methodology to include an efficient simulation of wireless systems. It proposes to achieve this by employing a system-level model of a noisy wireless communication channel, along with a small repertoire of standard components (which of course can be replaced on a per application basis). Finally, to validate our developed methodology, a flocking behaviour system is selected as a demonstration (case study). This is a very complex system modelled based on the developed methodology and partitioned along different parameters. By applying our developed methodology to model this system as a case study, we can prove that incorporating and fixing the wireless channel, wireless protocol, noise or all of these elements early in the design methodology is very advantageous. The modelled system is introduced to simulate the behaviour of the particles (mobile units) that form a mobile ad-hoc communication network. Wireless communication between particles is addressed with two scenarios: the first is created using a wireless channel model to link each pair of particles, which means the wireless communication between particles is addressed using a Point-to-Point (P2P) channel; the other scenario is created using a shared channel (broadcast link). Therefore, incorporating wireless features into existing SystemC design methodology, as done in this research, is a very important task, because by developing SystemC as a design tool to support wireless systems, hardware aspects, software parts and communication can be modelled, refined and validated simultaneously on the same platform, and the design space expanded into a two-dimensional design space comprising system and communication.

In this thesis, a modal decomposition method and a time-frequency-domain formalism for the analysis of multimode dynamics of semiconductor ring laser are developed. The diffusion coefficient is suggested as a crucial parameter to take into account. The directional switching dynamics and dependence on the operation parameters has been studied. The lasing wavelength switching accompanied by directional flipping have also been studied. In this framework, a prior selection of the lasing mode is seen as a key factor for the numerical results.

The incessant technology scaling has enabled the integration of functionally complex System-on-Chip (SoC) designs with a large number of heterogeneous systems on a single chip. The processing elements on these chips are integrated through on-chip communication structures which provide the infrastructure necessary for the exchange of data and control signals, while meeting the strenuous physical and design constraints. The use of vast amounts of on chip communications will be central to future designs where variability is an inherent characteristic. For this reason, in this thesis we investigate the performance and variability tolerance of typical on-chip communication structures. Understanding of the relationship between variability and communication is paramount for the designers; i.e. to devise new methods and techniques for designing performance and power efficient communication circuits in the forefront of challenges presented by deep sub-micron (DSM) technologies. The initial part of this work investigates the impact of device variability due to Random Dopant Fluctuations (RDF) on the timing characteristics of basic communication elements. The characterization data so obtained can be used to estimate the performance and failure probability of simple links through the methodology proposed in this work. For the Statistical Static Timing Analysis (SSTA) of larger circuits, a method for accurate estimation of the probability density functions of different circuit parameters is proposed. Moreover, its significance on pipelined circuits is highlighted. Power and area are one of the most important design metrics for any integrated circuit (IC) design. This thesis emphasises the consideration of communication reliability while optimizing for power and area. A methodology has been proposed for the simultaneous optimization of performance, area, power and delay variability for a repeater inserted interconnect. Similarly for multi-bit parallel links, bandwidth driven optimizations have also been performed. Power and area efficient semi-serial links, less vulnerable to delay variations than the corresponding fully parallel links are introduced. Furthermore, due to technology scaling, the coupling noise between the link lines has become an important issue. With ever decreasing supply voltages, and the corresponding reduction in noise margins, severe challenges are introduced for performing timing verification in the presence of variability. For this reason an accurate model for crosstalk noise in an interconnection as a function of time and skew is introduced in this work. This model can be used for the identification of skew condition that gives maximum delay noise, and also for efficient design verification.

Scaling of complementary metal-oxide-semiconductor (CMOS) technology has benefited the semiconductor industry for almost half a century. For CMOS devices with a physical gate-length in the sub-100 nm range, extreme device variability is introduced and has become a major stumbling block for next generation analogue circuit design. Both opportunities and challenges have therefore confronted analogue circuit designers. Small geometry device can enable high-speed analogue circuit designs, such as data conversion interfaces that can work in the radio frequency range. These designs can be co-integrated with digital systems to achieve low cost, high-performance, single-chip solutions that could only be achieved using multi-chip solutions in the past. However, analogue circuit designs are extremely vulnerable to device mismatch, since a large number of symmetric transistor pairs and circuit cells are required. The increase in device variability from sub-100 nm processes has therefore significantly reduced the production yield of the conventional designs. Mismatch models have been developed to analytically evaluate the magnitude of random variations. Based on measurements from custom designed test structures, the statistics of process variation can be estimated using design related parameters. However, existing models can no longer accurately estimate the magnitude of mismatch for sub-100 nm “atomistic” devices, since short-channel effects have become important. In this thesis, a new mismatch model for small geometry devices will be proposed to address this problem. Based on knowledge of the matching performance obtained from the mismatch model, design solutions are desired at different design levels for a variety of circuit topologies. In this thesis, transistor level compensation solutions have been investigated and closed-loop compensation circuits have been proposed. At circuit level, a latch-based comparator has been used to develop a compensation solution because this type of comparator is extremely sensitive to the device mismatch. These comparators are also used as the fundamental building block for the analogue-to-digital converters (ADC). The proposed comparator compensation scheme is used to improve the performance of a high-speed flash ADC.

Heterojunction planar Gunn devices were first demonstrated by Khalid et al in 2007. This new design of Gunn device, or transferred electron device, was based on the well-established material system of GaAs as the oscillation media. The design did not only breakthrough the frequency record of GaAs for conventional Gunn devices, but also has several advantages over conventional Gunn devices, such as the possibility of making multiple oscillators on a single chip and compatibility with monolithic integrated circuits. However, these devices faced the challenge of producing high enough RF power for practical applications and circuit technology for integration. This thesis describes systematic work on the design and characterisations of planar Gunn diodes and the associated millimetre-wave circuits for RF signal power enhancement. Focus has been put on improving the design of planar Gunn diodes and developing high performance integrated millimetre-wave circuits for combining multiple Gunn diodes. Improvement of device design has been proved to be one of the key methods to increase the signal power. By introducing additional δ-doping layers, electron concentration in the channel increases and better Gunn domain formation is achieved, therefore higher RF power and frequency are produced. Combining multiple channels in the vertical direction within devices is another effective way to increase the output signal power as well as DC-to-RF conversion efficiency. In addition, an alternative material system, i.e. In0.23Ga0.77As, has also been studied for this purpose. Planar passive components, such as resonators, couplers, low pass filters (LPFs), and power combiners with high performance over 100 GHz have been developed. These components can be smoothly integrated with planar Gunn diodes for compact planar Gunn oscillators, and therefore contribute to RF power enhancement. In addition, several new measurement techniques for characterising oscillators and passive devices have also been developed during this work and will be included in this thesis.