Decreasing the cycle time of panels in the printed circuit card manufacturing process has been a significant research topic over the past decade. The research objective in such literature has been to reduce the placement machine cycle times by finding the optimal placement sequences and component-feeder allocation for a given, fixed, panel component layout for a given machine type. Until now, no research has been found which allows the alteration of the panel configuration itself, when panelization is a part of that electronic panel design. This research will be the first effort to incorporate panelization into the cycle time reduction field. The PCB circuit design is not to be altered; rather, the panel design (i.e., the arrangement of the PCB in the panel) is altered to reduce the panel assembly time. Component placement problem models are developed for three types of machines: The automated insertion machine (AIM), the pick-and-place (PAPM) machine, and the rotary turret head machine (RTHM). Two solution procedures are developed which are based upon a genetic algorithm (GA) approach. One procedure simultaneously produces solutions for the best panel design and component placement sequence. The other procedure first selects a best panel design based upon an estimation of its worth to the minimization problem. Then that procedure uses a more traditional GA to solve for the component placement and component type allocation problem for that panel design. Experiments were conducted to discover situations where the consideration of panelization can make a significant difierence in panel assembly times. It was shown that the PAPM scenario benefits most from panelization and the RTHM the least, though all three machine types show improvements under certain conditions established in the experiments. NOTE: An updated copy of this ETD was added on 09/17/2010. / Ph. D.

In this thesis, vibration analyses of electronic assemblies that consist of an electronic box, printed circuit board and electronic components are presented. A detailed vibration analysis of a real electronic assembly is performed by finite element methods and vibration tests. Effects of component addition and component modeling are investigated by finite element analysis in detail. Results are compared in order to identify the most efficient, reliable and suitable method depending on the type of problem. Experimental results for the vibration of an electronic box, PCB and components are presented and discussed. Furthermore, an analytical model that represents a printed circuit board and electronic component is suggested for fixed and simply supported boundary conditions of the PCB. Different types of electronic components are modeled analytically to observe different dynamic characteristics. The validity of the analytical model is computationally checked by comparing results with those of finite element solution.

The project contains theoretical research of electrotechnical manufacture for lead-free reflow soldering. It contains characterization of soldering processes. Includes variations of solder paste printing, principles of part placing and also reflow soldering process. The project appoints possibilities of testing solder joints strength, mainly focused on mechanical vibrations. It describes a design and preparation of solder joint strength test methods by mechanical vibrations. It compares influence of vibrations on part types and solder alloys.

Neste trabalho foram estudadas as etapas de processo envolvidas na tecnologia Pin-in-Paste (PIP) de soldagem por refusão de componentes convencionais (THCs - Through Hole Components ou Componentes de Furo Passante) em placas de circuito impresso (PCIs), utilizando pasta de solda sem chumbo (lead-free) com liga SAC (Sn-Ag-Cu) de forma a atender as novas exigências ambientais para a montagem eletrônica. Inicialmente foi feito o projeto da PCI de teste com três diferentes componentes THCs e três componentes SMD com encapsulamentos distintos, com o objetivo de reproduzir uma PCI comercial. Foram gerados dois diâmetros de furos diferentes para inserir os THCs, possibilitando o estudo da variação de preenchimento com solda no PTH. Foi proposta uma equação para o cálculo do volume de pasta de solda a ser impresso sobre os furos no processo de montagem. A partir desta equação foram calculadas as dimensões dos furos do estêncil para a PCI de teste. Os parâmetros de impressão foram otimizados em função da variação de pressão e da velocidade do rodo. Duas curvas de refusão foram utilizadas, uma convencional e outra otimizada para verificar a variação na geração de defeitos. A impressão de pasta de solda ficou superior ao projetado, o que resultou em todas as amostras terem solda acima do parâmetro mínimo de aceitabilidade de volume de 75% de preenchimento do PTH. Esta sobre impressão ocasionou defeitos em boa parte dos componentes, excesso de solda nos filetes e resíduos de fluxo na solda nos PTHs. Tais defeitos foram expressivos para todos os THCs, mostrando que o excesso de pasta impressa foi decisivo na geração de defeitos para todas as combinações das variáveis estudadas. Os SMDs tiveram solda aceitável, apresentando apenas alguns casos de excesso de fluxo ou pouca solda em alguns QFPs devido ao uso de ilhas com dimensões maiores que o exigido em norma. O processo de Pin In Paste se mostra viável como substituto da solda onda em linhas de montagem para placas com SMDs e THCs, mas estudos posteriores deverão ser realizados para a geração de um modelo confiável de projeto de PCIs e estêncil com solda lead-free para que tal processo seja utilizado em grande escala na indústria. / This study describes the process steps involved in Pin-in-Paste (PIP) reflow soldering technology in printed circuit boards (PCBs) using lead-free solder paste with SAC alloy (Sn-Ag-Cu) in order to attend new environmental requirements for the electronics assembly. Initially it was designed a PCB test with three different THCs (Through Hole Component) and three different SMD (Surface Mount Device) packages in order to reproduce a commercial board. It was generated two different diameters of holes to insert the THCs, aiming to study the solder fill variation in PTH. An equation was proposed for calculating the volume of solder paste to be printed over the holes in the assembly process. From this equation it was calculated the dimensions of the holes of the stencil. The printing parameters were optimized according to the variation of pressure and speed of the squeegee. Two reflow curves were used in the process, a conventional one and an optimized one to determine the variations in the generation of soldering defects. The printed solder paste volume was higher than projected, which resulted in solder excess, causing defects in most of the components, such as excess solder in the fillet and solder flux residues in PTHs. Such defects were significant for all THCs, showing that the excess paste that was printed caused critical defects for all combinations of variables. Regarding that all samples were above the reflow minimum acceptable volume of 75% coverage of PTH. The SMDs solders were acceptable, with only few cases of solder flux excess. The Pin in Paste process was observed as a good option to replace the wave soldering thermal process for mixed PCBs. Further studies should be conducted to generate a reliable model of PCB and stencil design.

Neste trabalho foram estudadas as etapas de processo envolvidas na tecnologia Pin-in-Paste (PIP) de soldagem por refusão de componentes convencionais (THCs - Through Hole Components ou Componentes de Furo Passante) em placas de circuito impresso (PCIs), utilizando pasta de solda sem chumbo (lead-free) com liga SAC (Sn-Ag-Cu) de forma a atender as novas exigências ambientais para a montagem eletrônica. Inicialmente foi feito o projeto da PCI de teste com três diferentes componentes THCs e três componentes SMD com encapsulamentos distintos, com o objetivo de reproduzir uma PCI comercial. Foram gerados dois diâmetros de furos diferentes para inserir os THCs, possibilitando o estudo da variação de preenchimento com solda no PTH. Foi proposta uma equação para o cálculo do volume de pasta de solda a ser impresso sobre os furos no processo de montagem. A partir desta equação foram calculadas as dimensões dos furos do estêncil para a PCI de teste. Os parâmetros de impressão foram otimizados em função da variação de pressão e da velocidade do rodo. Duas curvas de refusão foram utilizadas, uma convencional e outra otimizada para verificar a variação na geração de defeitos. A impressão de pasta de solda ficou superior ao projetado, o que resultou em todas as amostras terem solda acima do parâmetro mínimo de aceitabilidade de volume de 75% de preenchimento do PTH. Esta sobre impressão ocasionou defeitos em boa parte dos componentes, excesso de solda nos filetes e resíduos de fluxo na solda nos PTHs. Tais defeitos foram expressivos para todos os THCs, mostrando que o excesso de pasta impressa foi decisivo na geração de defeitos para todas as combinações das variáveis estudadas. Os SMDs tiveram solda aceitável, apresentando apenas alguns casos de excesso de fluxo ou pouca solda em alguns QFPs devido ao uso de ilhas com dimensões maiores que o exigido em norma. O processo de Pin In Paste se mostra viável como substituto da solda onda em linhas de montagem para placas com SMDs e THCs, mas estudos posteriores deverão ser realizados para a geração de um modelo confiável de projeto de PCIs e estêncil com solda lead-free para que tal processo seja utilizado em grande escala na indústria. / This study describes the process steps involved in Pin-in-Paste (PIP) reflow soldering technology in printed circuit boards (PCBs) using lead-free solder paste with SAC alloy (Sn-Ag-Cu) in order to attend new environmental requirements for the electronics assembly. Initially it was designed a PCB test with three different THCs (Through Hole Component) and three different SMD (Surface Mount Device) packages in order to reproduce a commercial board. It was generated two different diameters of holes to insert the THCs, aiming to study the solder fill variation in PTH. An equation was proposed for calculating the volume of solder paste to be printed over the holes in the assembly process. From this equation it was calculated the dimensions of the holes of the stencil. The printing parameters were optimized according to the variation of pressure and speed of the squeegee. Two reflow curves were used in the process, a conventional one and an optimized one to determine the variations in the generation of soldering defects. The printed solder paste volume was higher than projected, which resulted in solder excess, causing defects in most of the components, such as excess solder in the fillet and solder flux residues in PTHs. Such defects were significant for all THCs, showing that the excess paste that was printed caused critical defects for all combinations of variables. Regarding that all samples were above the reflow minimum acceptable volume of 75% coverage of PTH. The SMDs solders were acceptable, with only few cases of solder flux excess. The Pin in Paste process was observed as a good option to replace the wave soldering thermal process for mixed PCBs. Further studies should be conducted to generate a reliable model of PCB and stencil design.

La majeure partie des équipements électroniques qui nous entourent fonctionne dans des environnements plutôt cléments où les variations thermiques sont d’amplitudes faibles à modérées. En aéronautique, l’utilisation d’équipements fonctionnant dans des milieux beaucoup plus hostiles que les environnements traditionnellement rencontrés en électronique pourrait permettre d’améliorer considérablement les performances des aéronefs, notamment en terme de poids, de consommation de carburant et de coût de maintenance. Toutefois, l’utilisation d’assemblages électroniques « classiques » dans des environnements où les variations thermiques sont fortes pose des problèmes techniques majeurs : les hautes températures peuvent faire fondre les alliages de brasure courants et la fatigue thermomécanique peut très rapidement provoquer la défaillance des assemblages. Pour pallier ces problèmes, les composants électroniques peuvent être reportés par frittage d’argent dans les circuits. En effet, cette technologie d’assemblage permet de remplacer les brasures usuelles par un matériau ayant un point de fusion nettement plus élevé : l’argent pur (Tfus=962°C). Cependant, le frittage a tendance à produire des matériaux poreux et la porosité peut avoir un effet néfaste sur le vieillissement des joints d’attache des composants électroniques. Par conséquent, dans cette thèse, les liens existant entre profil thermique de frittage et porosité ainsi que ceux existant entre porosité et résistance aux cycles thermiques (-65°C/+200°C) ont été étudiés. Par ailleurs, la question des interactions métallurgiques pouvant se produire à hautes températures entre l’argent fritté et certaines métallisations usuelles de composants et de substrats a également été abordée. / Most of usual electronic devices operate in environments where the amplitude of temperature changes is limited. The use of electronic equipment operating in harsh environments in aircrafts could however improve their performances, especially their weight, their gas consumption and their cost of maintenance. Unfortunately the use of classical electronic assembly technologies in environments where wide amplitude thermal variations take place raises major technical issues: the high temperatures reached in some parts of aircrafts can melt usual brazing materials and thermomechanical fatigue can induce early failure of the assemblies. To prevent these problems from happening, electronic components can be attached using silver sintering. One of the strengths of this technology is that it allows the replacement of traditional brazing material by a high melting point material: pure silver (Tm=962°C). Silver sintering nevertheless leads to a porous material and porosity can have a negative impact on the ageing of the attachment joints of electronic components. One of the goals of this PhD thesis is therefore to study the link between the sintering temperature profile and the porosity of silver. Furthermore the impact of different rates of porosity on the mechanical behavior of silver has been assessed. These investigations have mainly been focused on the fatigue behavior of porous silver electrical junctions under thermal cycling (-65°C/+200 °C). The question of the metallurgical interactions that may exist at high temperatures between silver and some of the usual metallization of components and/or substrates has lastly been addressed.