The circuitry of a dynamic register capable of decimal storage is developed as a basic operational block for a hybrid computer based on quantized pulse positions. Interconnections of these dynamic registers are studied with special reference to a five-digit parallel adder and an integrator comprising an incremental register and a serial adder. Input-output operations employing commercially available decade counting and display devices are discussed. A simple time-modulation type analogue-to-digital encoder for the computer is proposed. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate