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Electronic functional test generation and scheduling using an intelligent knowledge-based system and heuristic techniquesLea, Stephen Michael January 1990 (has links)
No description available.
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Design of certain silicon semi-customised structures incorporating self-testTaylor, David January 1989 (has links)
No description available.
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Canonic active RC networksAikens, Richard Stanley, 1936- January 1972 (has links)
No description available.
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Computer-aided-design of metal-oxide semiconductor circuitry using a process-sensitive device modelParker, Richard Frederick 12 1900 (has links)
No description available.
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Circuit techniques for CMOS amplifier accuracy and robustness improvement in high-side current sensing Read-out circuitYan, Rong Shen January 2017 (has links)
University of Macau / Faculty of Science and Technology / Department of Electrical and Computer Engineering
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Sequential logic instrumentationHull, William T. January 1964 (has links)
Call number: LD2668 .T4 1964 H91 / Master of Science
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Cost-effective test at system-levelKim, Hyun-moo, January 2002 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2002. / Vita. Includes bibliographical references. Available also from UMI Company.
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Active equivalent network generation and sensitivity studyPrice, Burt Lee 05 1900 (has links)
No description available.
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Noise models of A/D and D/A converters for determination of fundamental noise limitationsTaylor, Katherine P. 08 1900 (has links)
No description available.
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Development of a statistical model for NPN bipolar transistor mismatchLamontagne, Maurice. January 2007 (has links)
Thesis (M.S.) -- Worcester Polytechnic Institute. / Keywords: statistical model; mismatch; bipolar transistor. Includes bibliographical references (p.29).
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