Neuromorphic computing is a recent and growing field of research. Its conceptual attractiveness is due to the potential it has in deep learning applications such as sensor networks, low-power computer vision, robotics and other fields. Inspired by the functioning of brain, different neural network models have been devised, each with their own special focus on certain applications. Using such computing models are already helping us in different cases such as image, character and voice recognition, data analysis, stock market prediction, etc. Among the multitude of artificial neural models available, spiking neurons are more deeply inspired by biological neural networks. Leaky, Integrate and Fire (LIF) neuron model is one such model that can reproduce a good number of functions, be simple and also extensible in structure. Current deep learning applications are tied to servers and datacenters for their power and resource hungry existence. This work aims at building a low power neuron core taking advantage of LIF neuron, that could possible result in independent battery powered devices. A hardware design of LIF neuron based scalable neural core is explored, constructed and analysis for power consumption is made.

The need for electromagnetic compatibility is growing steadily as the usage of electronics in our daily lives is increasing more than ever. A common issue encountered in electromagnetic compatibility testing is analogue sensors that fail when exposed to electromagnetic fields. Testing how well electronics do when exposed to electromagnetic fields is called susceptibility testing, and standards for how to do these tests have been developed to ensure that the results of the tests can be reproduced. In this thesis work, analogue temperature sensors have been shielded using a few common techniques. The susceptibility of the sensors has been analysed by looking at their output voltage when the sensors were exposed to electro- magnetic fields of different field strengths. The output of the sensors was read by an Arduino that was shielded and tested to make sure it would not be affected by the electromagnetic fields used in the sensor tests. The result of the first set of sensor tests shows that shielding the cables running to the analogue temperature sensors and filtering away disturbances using ferrites gives a considerable decrease in susceptibility against electro- magnetic fields, while twisted cables and RC-filters did not. The results also showed that the introduction of a ground plane increased the susceptibility of the sensors, which most likely was due to it not providing the current with a path of less impedance and only served to increase the length of the unintentional antenna, which made it couple to the electromagnetic field more easily. However, during a second round of testing, the results of all the tests were hard to reproduce exactly, which calls into question how trustable the results of standardised susceptibility tests are. Therefore, when designing for the electromagnetic susceptibility of a product, a rather wide margin should be used in order to make sure that the product can reliably pass susceptibility tests. / Användningen av elektronik ökar i samhället och därför även nödvändigheten för testning av elektromagnetisk kompatibilitet. Ett vanligt problem inom elektromagnetisk kompatibilitet är att analoga sensorer lätt blir utstörda av elektromagnetiska fält. Hur man ska testa en elektronisk produkts känslighet mot elektromagnetiska fält styrs av standarder som ser till att resultaten av testerna går att återskapa. I detta examensarbete har analoga temperatursensorer skärmats med ett par vanliga metoder. Sensorernas känslighet har analyserats genom att undersöka hur deras utspänning påverkas när sensorn blir utsatt för elektromagnetiska fält med olika fältstyrkor. Sensorernas utspänning lästes av en Arduino som skärmades och testades för att se till all att den inte påverkades av de elektromagnetiska fälten som användes under testandet av sensorerna. Resultaten från de första sensortesterna visar att använda skärmade kablar till de analoga temeperatursensorerna och att filtrera bort störningar med ferriter sänkte sensorernas känslighet mot elektromagnetiska fält betydligt medan tvinnade kablar och RC filter inte gjorde det. Testerna visade också att jord- plan i detta fall ökade sensorernas känslighet då de inte erbjöd en bättre väg för strömmen att gå utan endast skapade en längre oavsiktlig antenn, vilket gjorde att den lättare kunde koppla till det elektromagnetiska fältet. Däremot visade det sig i en andra testomgång, att resultaten inte gick att återskapa ex- akt. Detta ifrågasätter hur tillförlitliga dessa standardiserade tester är och visar att man bör ha en ganska bred marginal när man designar för att minska en produkts känslighet mot elektromagnetiska fält, så att den på ett tillförlitligt sätt kommer kunna klara av känslighetstester.

Wireless power and data transfer systems are experiencing an ever-growing consumer and industrial adoption. Its use in common devices has made the technology more accessible to people, but seldomly does it replace a physical connection inside a product. When two parts of an assembly are to be electrically connected, the solution has traditionally been connectors or wires. However, typical connection methods using physical connectors between two devices can be fragile and sensitive to dust and debris. In this degree project, a wireless power and data connection between two parts of an industrial nutrunner are evaluated. A very compact nutrunner encasement calls for a minimal wireless interface with high efficiency. Additional complications are met when the nutrunner body is made of metal, which introduces losses. Electromagnetic simulations of a flexible PCB transformer with ferrite film backing are performed in the simulation software Finite Element Method Magnetics (FEMM), and electrical performance is evaluated in the circuit simulator LT-Spice. From the best performing solution, a physical model is constructed and evaluated. The final implementation uses a flyback converter for power transfer, and amplitude modulated data for bi-directional data transfer. Results indicate the potential for excellent performance with 1 W power transfer with more than 50 % efficiency whilst simultaneously transferring data at a rate greater than 1 Mbit/s. / Trådlös effekt och dataöverförings system ser allt fler tillämpningar i konsument och industriella sektorn. Dess implementation i vardagliga enheter har gjort teknologin mer tillgänglig för människor, men den ersätter sällan fysiska kontakter inuti produkter. När två delar av en produkt skall sammankopplas elektriskt har den traditionella lösningen varit kontakter eller sladdar. Däremot så kan typiska anslutningsmetoder med fysiska kontakter vara ömtåliga samt känsliga för damm och smuts. I detta examensarbete undersöks ett trådlöst effekt och data gränssnitt mellan två delar av en industriell mutterdragare. En väldigt kompakt mutterdragrinkapsling medför ett väldigt kompakt trådlöst gränssnitt med hög verkningsgrad. Ytterligare komplikationer uppstår när mutterdragaren är gjord av metall, vilket medför förluster. Elektromagnetiska simuleringar av en flexibel kretskorts transformator utförs i simuleringsprogrammet Finite Element Method Magnetics (FEMM) och elektrisk prestanda undersöks i kretssimulatorn LT-Spice. En prototyp konstrueras från den lösning som presterat bäst och denna utvärderas. Den slutgiltiga implementationen använder en flyback omvandlare för effektöverföring och amplitud modulerade data för dubbelriktad datakommunikation. Resultat indikerar god prestanda med 1 W effekt överfört vid mer än 50 % verkningsgrad samtidigt som data överförs med en hastighet mer än 1 Mbit/s.

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Modern enterprise-grade systems with virtually unlimited resources have many options when it comes to implementing state of the art intrusion prevention and detection solutions. These solutions are costly in terms of energy, execution time, circuit board area, and capital. Sustainable Internet of Things devices and power-constrained embedded systems are thus forced to make suboptimal security trade-offs. One such trade-off is the design of architectures which prevent execution of injected shell code, yet have allowed Return Oriented Programming (ROP) to emerge as a more reliable way to execute malicious code following attacks. ROP is a method used to take over the execution of a program by causing the return address of a function to be modified through an exploit vector, then returning to small segments of otherwise innocuous code located in executable memory one after the other to carry out the attacker's aims. We show that the Tiva TM4C123GH6PM microcontroller, which utilizes anARM Cortex-M4F processor, can be fully controlled with this technique. Firmware code is pre-loaded into a ROM on Tiva microcontrollers which can be subverted to erase and rewrite the flash memory where the program resides. That same firmware is searched for a Turing-complete gadget set which allows for arbitrary execution. We then design and evaluate a method for verifying the integrity of firmware on embedded systems, in this case Solid State Drives (SSDs). Some manufacturers make firmware updates available, but their proprietary protections leave end users unable to verify the authenticity of the firmware post installation. This means that attackers who are able to get a malicious firmware version installed on a victim SSD are able to operate with full impunity, as the owner will have no tools for detection. We have devised a method for performing side channel analysis of the current drawn by an SSD, which can compare its behavior while running genuine firmware against its behavior when running modified firmware. We train a binary classifier with samples of both versions and are able to consistently discriminate between genuine firmware and modified firmware, even despite changes in external factors such as temperature and supplied power. / Doctor of Philosophy / To most consumers and enterprises, a computer is the desktop or laptop device they use to run applications or write reports. Security for these computers has been a top priority since the advent of the Internet and the security landscape has matured considerably since that time. Yet, these consumer-facing computers are outnumbered several times over by embedded computers and microcontrollers which power ubiquitous systems in industrial control, home automation, and the Internet of Things. Unfortunately, the security landscape for these embedded systems is in relative infancy. Security controls designed for consumer and enterprise computers are often poorly suited for embedded system due to constraints such as power, memory, processing, and real-time performance demands. This research considers the unique constraints of embedded systems and analyzes their security in a practical way. We begin by exploring the mechanism and extent to which a device can be compromised. We show that a technique known as Return Oriented Programming (ROP) can be used to bypass some of the process control protections in place and that there can be enough existing code in the firmware to allow an attacker to execute code at will. This leads naturally to the question of how embedded computers can be secured. One important security assurance is the knowledge that a device is running legitimate firmware. This can be difficult for a device owner to verify due to proprietary protections put in place by manufacturers. However, we contribute a method to detect modifications to firmware on embedded systems, particularly Solid State Drives. This is done through an analysis of the current drawn during drive operations with best-practice data classification techniques. The findings of this research indicate that current embedded devices present a larger surface area for attack, less sophistication required for attack, and a larger quantity of devices vulnerable to attack. Even though these findings should raise concern, we also found that there are practical methods for detecting attack via monitoring and analysis.

The Wake Forest University Physiology/Pharmacology (WFU Phys./Pharm.) electrophysiology research labs currently carry out memory research by recording neural signals from laboratory animals tethered to nearby signal conditioning and recording equipment. A wireless neural signal recording system is desirable because it removes the cumbersome wires from the animal, allowing it to roam more freely. The result is an animal that is more able to behave as it would in its natural habitat, thus opening the possibility of testing procedures that are not possible with wired recording systems. Sampling rates obtained by conventional RF wireless systems tend to be very low (800Hz) since the bandwidth of these RF wireless systems is low. This is because interfacing methods (RS-232) needed to develop RF systems are slow (57.6Kbps). Another shortcoming of RF systems is the high power consumption. This thesis presents development of embedded wireless system to replace wired systems. RF wireless system is developed to replace wired electrophysiology system. An infrared wireless system development is discussed to achieve higher sampling rates unachievable by RF wireless system. Infrared operate at data rates 4Mbps and high sampling rates can be achieved. For this thesis, Infrared system is interfaced to microcontroller using ISA interface. ISA bus is chosen as it operates (at rate of 8Mbytes/sec) faster than RS-232 and easy to program compared to other buses such as PCI. Also, Infrared systems consume low power than RF systems. Power consumption is an important consideration as application in hand is battery powered. / Master of Science

Faculty of Science School of Statistics and Actuarial science 9802374m nhuang@glenrandmib.co.za / The purpose of this research report is to review the embedded value concept and to examine its practical use in South Africa. Important recent developments relating to the embedded value concept are discussed and compared with the existing embedded value concept. These developments include fair value accounting, market-consistent embedded value and the European Embedded Value Principle. In the second part of the report, the disclosure of the embedded value information of four major South African life assurance companies is examined. It was found that the market capitalisations of these companies were smaller than their embedded values for most of the period under the investigation. Reasons for this phenomenon are considered and tested against the data available. It was found that the risk discount rates used by some life assurance companies in calculating their embedded values may be too low. It appears that a ‘herding’ tendency exists among South African life assurance companies when selecting risk discount rates for the embedded value calculation. It is suggested that a more market consistent approach for the embedded value calculation and a better disclosure for the embedded value reporting should be considered by life assurance companies in South Africa. This should improve investors’ understanding and confidence in the embedded value disclosed, which in turn should help narrow or eliminate the discount of the market capitalisation to the embedded value observed in the market.

Técnicas que partem de modelos de alto nível de abstração são requeridas para lidar com a complexidade encontrada nas novas gerações de sistemas embarcados, sendo cruciais para o sucesso do projeto. Uma grande redução do esforço pode ser obtida com o uso de modelos quando código em uma linguagem de programação pode ser gerado automaticamente a partir desses. Porém, ferramentas disponíveis para modelagem e geração de código normalmente são dependentes de domínio e o software embarcado normalmente possui comportamento heterogêneo, requerendo suporte a múltiplos modelos de computação. Nesta tese, estratégias para desenvolvimento de software embarcado baseado em modelos de alto nível usando UML e Simulink são analisadas. A partir desta análise, observaram-se as principais limitações das abordagens para geração de código baseadas em UML e Simulink. Esta tese, então, propõe estratégias para melhorar a automação provida por estas ferramentas, como por exemplo, propondo uma abordagem para geração de código multithread a partir de modelos Simulink. A comparação feita entre UML e Simulink mostra que, embora UML seja a linguagem mais usada no domínio de engenharia de software, UML é baseada em eventos e não é adequada para modelar sistemas dataflow. Por outro lado, Simulink é largamente usado por engenheiros de hardware e de controle, além de suportar dataflow e geração de código. Porém, Simulink provê abstrações de mais baixo nível, quando comparado a UML. Conclui-se que tanto UML como Simulink possuem prós e contras, o que motiva a integração de ambas linguagens em um único fluxo de projeto. Neste contexto, esta tese propõe também uma abordagem integradora para desenvolvimento de software embarcado que inicia com uma especificação de alto nível descrita usando diagramas UML, a partir da qual modelos dataflow e control-flow podem ser gerados. Desta maneira, o modelo UML pode ser usado como front-end para diferentes abordagens de geração de código, incluindo UML e a proposta geração de código multithread a partir de modelos Simulink. / The use of techniques starting from higher abstraction levels is required to cope with the complexity that is found in the new generations of embedded systems, being crucial to the design success. A large reduction of design effort when using models in the development can be achieved when there is a possibility to automatically generate code from them. Using these techniques, the designer specifies the system model using some abstraction and code in a programming language is generated from that. However, available tools for modeling and code generation are domain-specific and embedded software usually shows heterogeneous behavior, which pushes the need for supporting software automation under different models of computation. In this thesis, strategies for embedded software development based on high-level models using UML and Simulink were analyzed. We observed that the embedded software generation approaches based on UML and Simulink have limitations, and hence this thesis proposes strategies to improve the automation provided on those approaches, for example, proposing a Simulink-based multithread code generation. UML is a well used language in the software engineering domain, and we consider that it has several advantages. However, UML is event-based and not suitable to model dataflow systems. On the other side, Simulink is widely used by control and hardware engineers and supports dataflow, and time-continuous models. Moreover, tools are available to generate code from a Simulink model. However, Simulink models represent lower abstraction level compared to UML ones. This comparison shows that UML and Simulink have pros and cons, which motivates the integration of both languages in a single design process. As the main contribution, we propose in this thesis an integrated approach to embedded software design, which starts from a high-level specification using UML diagrams. Both dataflow and control-flow models can be generated from that. In this way, an UML model can be used as front-end for different code generation approaches, including UML-based one and the proposed Simulink-based multithread code generation.

Security and reliability in processor based systems are concerns requiring adroit solutions. Security is often compromised by code injection attacks, jeopardizing even ???trusted software???. Reliability is of concern, where unintended code is executed in modern processors with ever smaller feature sizes and low voltage swings causing bit flips. Countermeasures by software-only approaches increase code size and therefore significantly reduce performance. Hardware assisted approaches use additional hardware monitors and thus incur considerably high hardware cost and have scalability problems. Considering reliability and security issues during the design of an embedded system has its advantages as this overcomes the limitations of existing solutions. The research work presented in this thesis combines two elements: one, defining a hardware software design framework for reliability and security monitoring at the granularity of micro-instructions, and two, applying this framework for real world problems. At a given time, a processor executes only a few instructions and large part of the processor is idle. Utilizing these idling hardware components by sharing them with the monitoring hardware, to perform security and reliability monitoring reduces the impact of the monitors on hardware cost. Using micro-instruction routines within the machine instructions, allows us to share most of the monitoring hardware. Therefore, our technique requires little hardware overhead in comparison to having additional hardware blocks outside the processor. This reduction in overhead is due to maximal sharing of hardware resources of the processor. Our framework is superior to software-only techniques as the monitoring routines are formed with micro-instructions and therefore reduces code size and execution time overheads, since they occur in parallel with machine instructions. This dissertation makes four significant contributions to the field of security and reliability on embedded processor research and they are: (i) proposed a security and reliability framework for embedded processors that could be included into its design phase; (ii) shown that inline (machine instruction level) monitoring will detect common security attacks (four inline monitors against common attacks cost 9.21% area and 0.67% performance, as opposed to previous work where an external monitor with two monitoring modules costs 15% area overhead); (iii) illustrated that basic block check-summing for code integrity is much simpler and efficient than currently proposed integrity violation detectors which address code injection attacks (this costs 5.03% area increase and 3.67% performance penalty with a single level control flow checking, as opposed to previous work where the area overhead is 5.59%, which needed three control flow levels of integrity checking); and (iv) shown that hardware assisted control flow checking implemented during the design of a processor is much cheaper and effective than software only approaches (this approach costs 0.24-1.47% performance and 3.59% area overheads, as opposed to previous work that costs 53.5-99.5% performance).

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