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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

Quick Java refactoring tool

Liu, Shendun 21 November 2013 (has links)
<p> Object Oriented Programming (OOP) is a contemporary favorite method of programming. OOP provides better flexibility, source codes are more organized and systematized, and it enables a group of developers to easily work with each other. Nevertheless, a poorly designed system will not only defeat the intention of coding with OOP, but also will make the software extremely difficult to maintain.</p><p> Refactoring is a powerful way to improve existing code. It only changes the structure of the source code without changing its functionality. Manually refactoring larger systems not only consumes large amounts of time and money, but it also happens to be incredibly inaccurate. As a result, quick and easy refactoring with partial automation is extensively discussed in the software realm.</p><p> This thesis presents algorithms for implementing nine refactorings that work on the fly for JAVA source code. The refactorings algorithms are implemented in a stepwise manner by initially selecting the source code portion for refactoring, and by choosing the correct refactoring method, and then programmatically changing the selected source code to achieve refactoring.</p>
12

Improving usability of pedagogical computer emulation interfaces

Williams, Stephen D. 21 November 2013 (has links)
<p> Computer emulations, simulating real or imagined computer systems, are a valuable tool to quickly gain understanding of computer architecture and software. Existing computer emulation systems offer useful but limited visualization and interaction. This paper addresses improving usability of pedagogical computer emulator interfaces with the application of published design principles informed by research into visuospatial ability. The results include a survey of promising techniques addressing similar problems and suggestions for application. Along with supporting work extending a publicly available Java-based PC emulator to enable use of the popular Processing visualization development environment, this provides a well-developed design and implementation framework for future improvements by interested parties.</p>
13

Design and Implementation of Spectrum-aware Wireless Multimedia Communication System

Tan, Kefeng 21 November 2013 (has links)
<p> The explosive mobile data growth needs more spectrum to accommodate the traffic. Existing policy of exclusive spectrum access has made today's spectrum both over-controlled and underutilized. One possibility to improve spectrum efficiency is via dynamic spectrum sharing, which has the potential to release a large percentage of underutilized spectrum. </p><p> Cognitive radio is one of the most promising technologies to facilitate dynamic spectrum sharing. Yet, there exist many problems for cognitive radio to support multimedia communications. This dissertation advances the concept of <i>&ldquo;spectrum aware&rdquo;</i> for cognitive-radio based wireless multimedia communication system. We interpret spectrum awareness in a broad way which includes spectrum sensing, spectrum effectiveness and spectrum efficiency. In particular, we have made the following contributions in this dissertaion: </p><p> &bull; We design and implement RECOG, a cognitive radio (CR) system that improves conventional CR with a smart sensing, fast backup channel searching and QoS managing. The proposed system is the first fully-fledge CR system that can supports real-time applications such as video chat. </p><p> &bull; We design and implement PINOKIO, a system that monitors spectrum usage and improves spectrum efficiency in frequency-agile WiFi networks. </p><p> &bull; We design and implement FAVICS, a frequency-aware video communication system that leverages the nature of unequal error protection (UEP) in frequency diversity for wireless streaming without modifying existing wireless PHY, and improve the peak signal-to-noise ratio (PSNR) of video streaming by 5&sim;10 dB.</p>
14

Toward a Hardware Accelerated Future

Lyons, Michael John 17 January 2014 (has links)
<p> Hardware accelerators provide a rare opportunity to achieve orders-of-magnitude performance and power improvements with customized circuit designs.</p><p> Many forms of hardware acceleration exist&mdash;attributes and trade-offs of each approach is discussed. Single-algorithm accelerators, which maximize efficiency gains through maximum specialization, are one such approach. By combining many of these into a many-accelerator system, high specialization is possible with fewer specialization limits.</p><p> The development of one such single-algorithm hardware accelerator for managing compressed Bloom filters in wireless sensor networks is presented. Results from the development of the accelerator highlight scalability deficiencies in the way accelerators are currently integrated into processors, and that the majority of accelerator area is consumed by generic SRAM memory rather than algorithm-specific logic.</p><p> These results motivate development of the accelerator store, a system architecture designed for the needs of many-accelerator systems. In particular, the accelerator store improves inter-accelerator communication and includes support for sharing accelerator SRAM memories. Using a security application as an example, the accelerator store architecture is able to reduce total processor area by 30% with less than 1% performance overhead.</p><p> Using the accelerator store as a base, the ShrinkFit framework allows accelerators to grow and shrink, to achieve accelerated performance within small FPGA budgets and efficiently expand for more performance when larger FPGA budgets are available. The ability to resize accelerators is particularly useful for hybrid systems combining GP-CPUs and FPGA resources, in which applications may deploy accelerators to a shared FPGA fabric. ShrinkFit performance overheads for small and large FPGA resources are found to be low using a robotic bee brain workload and FPGA prototype.</p><p> Finally, future directions are briefly discussed along with details about the production of the robotic bee helicopter brain prototype.</p>
15

Analysis of multi-platform mobile application development

Thaden, Courtney B. 09 September 2014 (has links)
<p> The variety of mobile devices and their operating platforms has rapidly increased. With this increase come separate standards, programming languages, and distribution markets. Typically developers want to deliver their products to a variety of users encompassing various platforms; however choosing to develop using a native program for a platform can delay the development and release on another platform. Multi-platform development applications were created in order to deploy applications to various platforms in a more timely and cost efficient manner by using a single code base. </p><p> The purpose of this study was to investigate the multi-platform development applications MoSync, Appcelerator, and PhoneGap, create a test application using each multi-platform development application to run on the Android emulator and iOS simulator to determine performance, and also determine which multi-platform application was best suited for allowing a developer to create a mobile application that could be utilized on a variety of platforms.</p>
16

Dynamic Pricing in Heterogeneous Wireless Cellular Networks

Shrader, David 28 October 2014 (has links)
<p> Smart communications devices are giving users instant access to applications that consume large amounts of data. These applications have different requirements on the network for delivery of data. In order to support these different applications, operators are required to support multiple service classes. </p><p> Given the regulatory and technology constraints and the relatively high cost associated with wireless spectrum licensing and utilization, demand will exceed supply leading to congestion and overload conditions. In addition to new broadband radio technologies offering higher data rates, operators are looking at deploying alternate heterogeneous technologies, such as WLAN, to provide additional bandwidth for serving customers. It is expected that this will still fall short of providing enough network resources to meet the ITU requirement for 1% new call blocking probability. An economic mechanism that offers incentives to individuals for rational behavior is required in order in order to reduce the demand for network resources and resolve the congestion problem. </p><p> The research in this dissertation demonstrates that the integration of a dynamic pricing with connection admission control mechanism for an operator deploying cooperative heterogeneous networks (e.g., LTE and WLAN) offering multiple QoS service classes reduces the new call blocking probability to the required 1% level. </p><p> The experimental design consisted, first, of an analytical model of the CAC algorithm with dynamic pricing in a heterogeneous environment. The analytical model was subsequently validated through discrete-event simulation using Matlab. </p>
17

HDMI frame grabber

Gu, Xun 31 October 2014 (has links)
<p> The High-Definition Multimedia Interface (HDMI) is widely adopted by the modern media devices, and supporting HDMI source is required in many streaming and broadcasting solutions. This paper introduces an HDMI frame grabber design which will capture the image from an HDMI source, and then display the image on both a local HDMI display and a remote computer screen. As a result, the captured frame will be shared in the different locations across the network. The project design involves the embedded hardware/software development on a Xilinx FPGA board, and GUI/Network programming on the Microsoft .NET framework. The paper describes the embedded design to enable the HDMI and Ethernet peripherals on the FPGA board, analyzes the data format and protocol difference among the network nodes, and then introduces the method to convert and transport the data.</p><p> <i>Keywords:</i> Embedded Design, FPGA, HDMI, lwIP, Network Programming.</p>
18

Machine learning challenges for automated prompting in smart homes

Das, Barnan 23 October 2014 (has links)
<p> As the world's population ages, there is an increased prevalence of diseases related to aging, such as dementia. Caring for individuals with dementia is frequently associated with extreme physical and emotional stress, which often leads to depression. Smart home technology and advances in machine learning techniques can provide innovative solutions to reduce caregiver burden. One key service that caregivers provide is prompting individuals with memory limitations to initiate and complete daily activities. We hypothesize that sensor technologies combined with machine learning techniques can automate the process of providing reminder-based interventions or prompts. This dissertation focuses on addressing machine learning challenges that arise while devising an effective automated prompting system.</p><p> Our first goal is to emulate natural interventions provided by a caregiver to individuals with memory impairments, by using a supervised machine learning approach to classify pre-segmented activity steps into prompt or no-prompt classes. However, the lack of training examples representing prompt situations causes imbalanced class distribution. We proposed two probabilistic oversampling techniques, RACOG and wRACOG, that help in better learning of the "prompt" class. Moreover, there are certain prompt situations where the sensor triggering signature is quite similar to the situations when the participant would probably need no prompt. The absence of sufficient data attributes to differentiate between prompt and no-prompt classes causes class overlap. We propose ClusBUS, a clustering-based under-sampling technique that identifies ambiguous data regions. ClusBUS preprocesses the data in order to give more importance to the minority class during classification.</p><p> Our second goal is to automatically detect activity errors in real time, while an individual performs an activity. We propose a collection of one-class classification-based algorithms, known as DERT, that learns only from the normal activity patterns and without using any training examples for the activity errors. When evaluated on unseen activity data, DERT is able to identify abnormalities or errors, which can be potential prompt situations. We validate the effectiveness of the proposed algorithms in predicting potential prompt situations on the sensor data of ten activities of daily living, collected from 580 participants, who were part of two smart home studies.</p>
19

Introspective pushdown analysis and Nebo

Earl, Christopher 13 August 2014 (has links)
<p> In the static analysis of functional programs, control-flow analysis (&kappa;-CFA) is a classic method of approximating program behavior as a finite state automata. CFA2 and abstract garbage collection are two recent, yet orthogonal improvements, on &kappa;-CFA. CFA2 approximates program behavior as a pushdown system, using summarization for the stack. CFA2 can accurately approximate arbitrarily-deep recursive function calls, whereas &kappa;-CFA cannot. Abstract garbage collection removes unreachable values from the store/heap. If unreachable values are not removed from a static analysis, they can become reachable again, which pollutes the final analysis and makes it less precise. Unfortunately, as these two techniques were originally formulated, they are incompatible. CFA2's summarization technique for managing the stack obscures the stack such that abstract garbage collection is unable to examine the stack for reachable values.</p><p> This dissertation presents introspective pushdown control-flow analysis, which manages the stack explicitly through stack changes (pushes and pops). Because this analysis is able to examine the stack by how it has changed, abstract garbage collection is able to examine the stack for reachable values. Thus, introspective pushdown control-flow analysis merges successfully the benefits of CFA2 and abstract garbage collection to create a more precise static analysis.</p><p> Additionally, the high-performance computing community has viewed functional programming techniques and tools as lacking the efficiency necessary for their applications. Nebo is a declarative domain-specific language embedded in C++ for discretizing partial differential equations for transport phenomena. For efficient execution, Nebo exploits a version of expression templates, based on the C++ template system, which is a type-less, completely-pure, Turing-complete functional language with burdensome syntax. Nebo's declarative syntax supports functional tools, such as point-wise lifting of complex expressions and functional composition of stencil operators. Nebo's primary abstraction is mathematical assignment, which separates what a calculation does from how that calculation is executed. Currently Nebo supports single-core execution, multicore (thread-based) parallel execution, and GPU execution. With single-core execution, Nebo performs on par with the loops and code that it replaces in Wasatch, a pre-existing high-performance simulation project. With multicore (thread-based) execution, Nebo can linearly scale (with roughly 90% efficiency) up to 6 processors, compared to its single-core execution. Moreover, Nebo's GPU execution can be up to 37x faster than its single-core execution. Finally, Wasatch (the pre-existing high-performance simulation project which uses Nebo) can scale up to 262K cores.</p>
20

Optimizing frequency domain contention in wireless network

Abdnoor Al-zurfi, Huda Kadhem 14 August 2014 (has links)
<p> Wireless communication became popular in the last decades, giving the mobility to the users. However with increased number of users and contention, network efficiency can hardly keep up with user needs. This thesis focuses on a new frequency domain contention technique called FICA. In FICA, the channel is assumed to be using Orthogonal Frequency Division Multiplex (OFDM) with multiple sub-carriers. We investigated the use of multiple channels and multiple access points (APs) in the design. First we investigated having one channel that is divided into number of sub-carriers, it shows good result, but only for limited number of users. Therefore we worked on the second scenario of having several sub-channels and each sub-channel is divided into a number of sub-carriers to communicate through one AP. And for efficient result nodes contend on the contention band and winner nodes will have the chance to send their data through the transmission band. In real world, networks have more than one AP, for that reason we investigate the third scenario, which is having more than one AP. In this setup, the result showed significant outcome, that we can divide the channel into several sub-channels to serve more than one AP and hash an ID for each AP. We further investigated optimal number of ID bits that are used to represent the hashed receiver IDs. We summarize the results as following: 1) it is possible to divide the channel bandwidth into several sub-channels that is divided into several sub-carriers to serve large number of users. 2) node contention should be partitioned into contention band and transmission band to reduce the overhead that the contending node cause when contending on the whole channel. 3) AP ID is required when the network has more than one AP. 4) number of sub-carriers in the contention band has to increase at least to the double for higher efficiency, since more AP on the network would make the channel more loaded. 5) AP ID can be anything between 20-40 bits. Decreasing the ID to less than 40bits did not affect the throughput and efficiency of the channel.</p>

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