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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Stress Study of Silicon Die for Filp-Chip Package Under Different Types of Stress Loading

Cheng, Mao-Chuan 22 January 2007 (has links)
Over the past years, there are many studies discusses different modes of die cracking and improvement. Die cracking is one of the crucial issues that influence the reliability of flip chip assemblies. Die cracking depends on a combination of several factors, such as residual bending stresses generated in the package due to mismatches in the coefficients of thermal expansion(CTE) of the various materials in the assembly or wafer dicing process . In this study, the stresses in the chip of a FCBGA (Flip-Chip Ball Grid Array) induced by the temperature raising and by the mechanical load of different pressures on an automatic test handler are investigated by using commercial finite element software ANSYS, while the FCBGA is subjected to the high temperature electrically test. The causes and precautions corresponding to the die cracking are studied in order to improve the reliability of products.
2

Flip Chip Bond Process with Copper Bump Substrate

Chen, Chien-wen 06 February 2007 (has links)
90nm wafer process has been released in production, but the bump pitch released in production is 180um. The major problem is the yield of solder paste printing process below 180um will be less than 80%. It means the cost will be very high. Thus it is difficult to make 150um bump pitch by using printing process in production. Substrate C4 pad will be bumped by pre-solder, and it will be jointed with wafer bump after re-flow process. The printing process is the most popular process in C4 pad pre-solder due to low cost and high throughput. But the challenge of 150um and even more of the wafer bump pitch shrinkage are the inevitable trend. So, a lot of substrate manufacturers are trying to develop the new process for C4 pro-solder pitch less than 100um. As soon as the C4 pad pre-solder pitch has been shrunk, the solder volume will be shrunk as well. It means the bump structure will be getting weak, and it may not pass the reliability tests. Thus, to evaluate the workability of bump structure is our purpose. First, the simulation software is used to compare the fatigue lives of two structures by using solder bump and copper bump substrates during thermal cycling test, and then to proceed the whole FCBGA process and reliability tests. The result of evaluation confirm the workability of FCBGA product using copper bump substrate, and it can be used with the same parameter and machine in solder bump substrate. Keyword¡GFCBGA, Substrate, Bump, Cold Joint, Delamination

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