This thesis is to research connection process of multi-level conductor in integration circuits (ICs) manufacture technology. For the sake of sub-micro ICs which is gazed by people in the future, device¡¦s dimension have to be scaled down unceasingly; besides, the design of conductor connection of multi-level metal is also to be adopted for ULSI technology. However, the number of metal connection layer is increasing as well as the distance between wires is shorter and shorter, which leads to the fact that the RC delay time of metal interconnection is the primary reason of limiting the speed of semiconductor device while electronic signal is delivered among metal interconnection. In order to lower delay time of signal propagation, there are two parts in the following: In the aspect of lowering resistance, we substitute copper (resistance is 1.7£g£[-cm) at present for aluminum (resistance is 2.7£g£[-cm ) in the past so as to make copper be the wire for interconnection system. Furthermore, the scaled down device not only increase the current density of the wire but also increase the severity of electromigration inside the wire. Copper atoms are so heavier than aluminum atoms that copper atoms can restrain electromigration appropriately. In the aspect of decreasing capacitance, we will develop low dielectric constant (low-k). But copper with Damascene manufacture under the conditions of external operation such as temperature and electric field give rise to the fact that Cu diffuses into low-k material so easily that copper and low-k interact, which deteriorates the characteristic of the material¡Braises the leakage current and leads to the breakdown of the dielectric material. Therefore, it must be an important topic for study that we search for the dielectric barrier material with the characteristic against copper diffusion under the demand coinciding with integration process compatibility. At present, because of the material film called silicon carbide with low dielectric constant (k=4~6) attracts a lot of people¡¦s eyes deeply, it can applied to dielectric barrier technology to replace traditional dielectric barrier silicon nitride with high dielectric constant (k~8) for the purpose of alleviating delay time of the wire system. This thesis will discuss fundamental characteristics of silicon carbide film and some problems during the integration process. For instance, the impacts on silicon carbide under the conditions of fluorine plasma and thermal treatment; furthermore, this thesis will research the electric problems from the integration of low-k dielectric barrier and copper wire as well as probes into mechanism of leakage current.