Thesis (M.S.)--University of Wisconsin--Madison, 1964. / eContent provider-neutral record in process. Description based on print version record. Bibliography: l. 62-63.

Thesis (M.S.)--University of Wisconsin--Madison, 1964. / eContent provider-neutral record in process. Description based on print version record. Bibliography: 2 l. at end.

No description available.

Frequency multiplication is an effect that arises in electronic components that exhibit a non-linear response to electromagnetic stimuli. Barriers to achieving very high frequency response from electronic devices are the device capacitance and other parasitic effects such as resistances that arise from the device geometry and are in general a function of the size of the device. In general, smaller device geometries and features lead to a faster response to electromagnetic stimuli. It was posited that the small size of the silicon nanowires (SiNWs) would lead to small device capacitance and spreading resistance, thus making the silicon nanowires useful in generating microwave and terahertz radiation by frequency multiplication. To verify this hypothesis, silicon nanowires based devices were fabricated and investigated using two experimental setups. The setups were designed to allow the investigation of the nanowire based devices at low frequencies and at high frequencies. Both setups consisted of an RF/microwave source, filters, waveguide, and a spectrum analyzer. They also allowed the characterization of the samples with a semiconductor parameter analyzer. The first step in the investigation of the SiNW devices was to install them in the waveguides and perform Current-Voltage (I-V) sweeps using the semiconductor parameter analyzer. The devices that exhibited the non-linear I-V characteristics typical of diodes were further investigated by first exposing them to 70MHz and 500MHz frequencies in the low frequency setup and then to 50GHz microwaves in the high frequency setup. The response of the devices was captured with a spectrum analyzer. The results demonstrate that the non-linear effect of frequency multiplication is present in nanowire devices from DC to 100GHz. The HF setup provides a platform that with an appropriate detector can be used to detect harmonics of the SiNWs in sub-millimeter/THz region of the electromagnetic spectrum.

No description available.

Thesis (M.Phil.)--Hong Kong University of Science and Technology, 2008. / Includes bibliographical references. Also available in electronic version.

The function of a frequency multiplier is verbatim -- a frequency multiplier is a circuit that takes a signal of particular frequency at the input and produces harmonic multiples of the input signal's frequency at the output. Their use is widespread throughout history, primarily in the application of frequency synthesis. When implemented as a part of a large system, a chain of multipliers can be used to synthesize multiple reference signals from a single high-performance reference oscillator. Frequency multiplier designs use a variety of nonlinear devices and topologies to achieve excitation of harmonics. This thesis will focus on the design and analysis of single ended bipolar junction transistor frequency multipliers. This topology serves as a relatively simple design that lends itself to analysis of device parasitics and nonlinearities. In addition, design is done in the Very High Frequency (VHF) band of 30-300 MHz to allow for design and measurement freedoms. However, the design methodologies and theory can be frequency scaled as needed. The parasitics and nonlinearities of frequency multipliers are well explored on the output side of circuit design, but literature is lacking in analysis of the drive network. In order to explore device nonlinearities on the drive side of the circuit, this thesis implements novel nonlinear reflectometry systems in both simulations and real-world testing. The simulation nonlinear reflectometry consists of intelligently configured voltage sources, whereas directional couplers allow for real world nonlinear reflectometry measurements. These measurements allow for harmonically rich reflected waveforms to be accurately measured, allowing for waveform engineering to be performed at the drive network. Further, nonlinear reflectometry measurements can be used to explain how load- and source-pull obtained drive and load terminations are able to achieve performance increases.

No description available.

A portable special purpose computer (s.p.c.) is described which provides decimal readouts of the first four moments of a fluctuating voltage v on four separate registers. A fifth register provides a readout of the measuring time which can be within the range 10 ms. to 30 Hrs. The s.p.c. can be switched to another mode which provides a measure of the cumulative amplitude distribution of v within sixteen positive and negative levels. Salient characteristics of the s.p.c. are as follows: (a) There are no low frequency limitations. The upper frequency limit, established by error considerations, is about 5 kHz with 99.73% confidence that the error is within 1%. (b) At the end of the measuring time T, all the four moments are immediately available in magnitude and sign. (c) The outputs can be available in any code, the only change necessary being in the code of the counting readout registers. (d) All computations for a sample are completed before the next sample arrives so that programming and unnecessary storage facilities are eliminated. The voltage input v is rectified and sampled systematically by an equi-interval a.d. converter. The samples, together with the sign bit, are fed into special purpose digital multipliers based on a "weighted feed" principle. The outputs from these multipliers, with the sign bit, arc fed to accumulators via parallel adders for each of the moments. The overflows of these accumulators are shown to be contributions to the various moments and are fed to the decimal display registers. Direct computation of the standard deviation (σ) of the input, from measured first and second moments has also been investigated. A theoretical analysis of the various errors which occur in such an s.p.c. has been made. Results indicate that for most signals the overall error is within 1% for all four moments. Finally, the development of a universal arithmetic cell, for use in iterative and near-iterative arrays, is reported in this thesis. It is shown that use of such arrays in the arithmetic units of the s.p.c. can lead to a considerably simplified design. / Thesis / Doctor of Philosophy (PhD)