Specific emitter identification refers to the process of performing identification of radio frequency transmitters by exploiting unique variations in emitted signals, caused by hardware variations. In previous research, specific emitter identification was successfully performed on GSM handsets. However, no research has been done on the implementation of specific emitter identification of GSM handsets on an FPGA platform. This study focuses on feature extraction and identification algorithms, as well as the implementation of the identification algorithm on an FPGA. During this study, phase modulation error was used, as previous research indicated that phase modulation error is an effective feature set for identification purposes. As the implementation of a classification algorithm on an FPGA was required, a trade-off between complexity and feasibility needed to be made during the selection process. The artificial neural network was selected as the optimal classifier for implementation on an FPGA. The algorithm was first implemented in software and used as the basis for the design on an FPGA. A piece-wise linear approximation of a sigmoid function was used to approximate the activation function, where a look-up table was used to store the parameters. The off-line training of the artificial neural network was performed in software using the back-propagation gradient descent algorithm. Good results for the identification of GSM handsets on an FPGA were obtained, with a true acceptance ratio of 97.0%. This result is similar to the performance obtained in previous research performed in software. In this study, it was found that specific emitter identification of GSM handsets can be performed on an FPGA. Real-world applications for this technology include general cellular handset identification and access control. / MSc (Electrical and Electronic Engineering), North-West University, Potchefstroom Campus, 2015

Specific emitter identification refers to the process of performing identification of radio frequency transmitters by exploiting unique variations in emitted signals, caused by hardware variations. In previous research, specific emitter identification was successfully performed on GSM handsets. However, no research has been done on the implementation of specific emitter identification of GSM handsets on an FPGA platform. This study focuses on feature extraction and identification algorithms, as well as the implementation of the identification algorithm on an FPGA. During this study, phase modulation error was used, as previous research indicated that phase modulation error is an effective feature set for identification purposes. As the implementation of a classification algorithm on an FPGA was required, a trade-off between complexity and feasibility needed to be made during the selection process. The artificial neural network was selected as the optimal classifier for implementation on an FPGA. The algorithm was first implemented in software and used as the basis for the design on an FPGA. A piece-wise linear approximation of a sigmoid function was used to approximate the activation function, where a look-up table was used to store the parameters. The off-line training of the artificial neural network was performed in software using the back-propagation gradient descent algorithm. Good results for the identification of GSM handsets on an FPGA were obtained, with a true acceptance ratio of 97.0%. This result is similar to the performance obtained in previous research performed in software. In this study, it was found that specific emitter identification of GSM handsets can be performed on an FPGA. Real-world applications for this technology include general cellular handset identification and access control. / MSc (Electrical and Electronic Engineering), North-West University, Potchefstroom Campus, 2015