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With the trends of fast edge rates, high clock frequencies, and low voltage levels for the high-speed digital computer systems, the ground bounce noise (GBN) or simultaneously switching noise (SSN) on the power/ground planes is becoming one of the major challenges for designing the high-speed circuits. In order to analyze the impact of the GBN on signal integrity (SI) and electromagnetic interference (EMI), an accurate and efficient modeling approach that considers the active devices and passive interconnects is required. This thesis focuses on two points. One is developing modeling approaches for analyzing the GBN effects, and the other is proposing solutions to reduce it. First, based on the FDTD algorithm several efficient modeling approaches including equivalent current-source method (ECSM), Kirchoff surface integral representation (KSIR), and slot-corrected 2D-FDTD are developed. After that, a power/ground-planes design for efficiently eliminating the GBN in high-speed digital circuits is proposed by using low-period coplanar electromagnetic bandgap (LPC-EBG) structure. Its extinctive behaviors of low radiation and broadband suppression of the GBN is demonstrated numerically and experimentally. Good agreements are seen.