Repetitive low level image processing transformations can be performed at high speeds by SIMD arrays, DSP and dedicated VLSI devices. These strategies cannot be adppted with more complex and time consuming data dependent algorithms. A flexible and programmable component must be used, and the use of many such devices in parallel, using dynamic load balancing techniques, is necessary to enable acceptable execution performance to be obtained. The transputer is a powerful new microprocessor with unique on chip communications facilities. Together with the new parallel programming language, occam, the transputer was specifically designed for parallel processing applications. Large transputer networks can be used for computationally intensive applications. This work has investigated the use of transputers for performing image processing algorithms of all three levels of complexity. Techniques were devised and implemented for the execution of low, medium and high levels of image processing algorithms on a multi-transputer network. A software architecture using SUPPLY and DEMAND processes was designed, and dynamic work load balancing was achieved, operating on a ternary tree network of up to 32 transputers. Some 80 image processing algorithms were successfully implemented within the software architecture. In particular, the more complex operation of Feature Extraction was achieved using the multi-transputer system. The Features extracted, involving Convex Hull, Convex Hull Deficiencies, Areas and Perimeters, and Shape Factors were used to build a Feature Vector. The use of this Feature Vector in Scene Interpretation, to realise Learn and Recognise functions has been investigated. The results of the work clearly show that while the system proposed is not as effective at executing repetitive, data intensive transformations as methods mentioned earlier, it can execute more complex Feature Extraction and Scene Interpretation algorithms efficiently. An Efficiency of 85% was achieved for Convex Hull formation, using 32 transputers.