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Approved for public release; distribution is unlimited / Each year the United States Marine Corps suffers excessive loss of man years from Marines awaiting entry-level schools. During fiscal year 2001 (the most recent complete time-awaiting-training data), Marines exceeded 2,800 man years of time awaiting training. Non-infantry personnel comprise 80% of the more than 30,000 recruits shipped to Marine Corps Recruit Depots each year, but they constitute almost 95% of the 2,800 man-year loss. Marine Corps manpower planners consider the current level of loss unacceptable and believe significant improvement can be gained by optimally scheduling courses at Military Occupational Specialty (MOS) schools. This thesis uses an integer linear program, Entry-Level Course Scheduler (ELCS), to optimize a course schedule that includes recommended seat assignments by MOS and gender. ELCS seeks to minimize the time awaiting training while successfully meeting yearly classification requirements. ELCS results using fiscal year 2003 data indicate time awaiting training can be reduced to only 1,700 man years (a 1,100 man-year improvement, when compared with fiscal year 2001 data). / Captain, United States Marine Corps

Thesis (Ph. D.)--Ohio State University, 2007. / Title from first page of PDF file. Includes bibliographical references (p. 119-120).

Thesis (M.S. in Operations Research)--Naval Postgraduate School, June 2004. / Thesis advisor(s): Robert A. Koyak. Includes bibliographical references (p. 59-61). Also available online.

Thesis (M.S. in Operations Research)--Naval Postgraduate School, March 2004. / Thesis advisor(s): R. Kevin Wood, Moshe Kress, Gerald G. Brown. Includes bibliographical references (p. 47-48). Also available online.

Division is one of the most fundamental arithmetic operations and is used extensively in engineering, scientific, mathematical and cryptographic applications. The implementation of arithmetic operation such as division, is complex and expensive in hardware. Unlike addition and subtraction, division requires several iterative computational steps on given operands to produce the result. Division, in the past has often been perceived as an infrequently used operation and received not as much attention but it is one of the most difficult operations in computer arithmetic. The techniques of implementation in hardware of such an iterative computation impacts the speed, the area and power of the digital circuit. For this reason, we consider two division algorithms based on their step size in shift. Algorithm 1 operates on fixed shift step size and has a fixed number of iteration while the Algorithms 2 operates on variable shift step size and requires considerably fewer number of iterations. In this thesis, technique is provided to save power and speed up the overall computation. It also looks at different design goal strategies and presents a comparative study to asses how each of the two design perform in terms of area, delay and power consumption. / Graduate / salmankh@uvic.ca

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