This thesis addresses two of the main issues required to build reliable terabit ATM networks. A high-capacity switch and an efficient error recovery protocol are the key elements in building a reliable terabit ATM network. In this thesis, a terabit switch architecture and a reliable end-to-end error recovery protocol for terabit networks are introduced. The proposed terabit ATM switch architecture is designed to work efficiently in low-capacity and high-capacity environments. The architecture is developed by interconnecting small-capacity switching modules in a scalable fashion. The switching module can be used alone as a small-capacity ATM switch. Multiple the switching modules can be used to achieve any required switching capacity. The proposed interconnecting scheme provides remarkable low cell-delay characteristics with a simple distributed cell scheduler. The proposed architecture has a high reliability: Even when a complete switching module fails the switch will continue to work efficiently. The switching element which is introduced as the main building block for the terabit switch architecture is a nonblocking input buffer ATM switch. The input buffers are implemented as groups of parallel shift-registers. The parallel nature of the storing buffers overcomes the Head Of Line and low throughput problems of existing input buffer switch architectures. In addition, using the shift registers overcomes the need for serial-to-parallel and parallel-to-serial format conversions. ATM networks support different types of services having different delay and loss requirements. A priority scheduling scheme is proposed to facilitate the support of different Qualities of Service. The proposed scheme satisfies both real-time and non-real-time service requirements. Cell loss is not acceptable for some data applications. This thesis proposes an efficient error recovery protocol which guarantees reliable communication with limited overhead. The proposed protocol requires a low number of control packets to achieve reliable communication. It also adapts itself, in order to work efficiently during both congested and non congested states. / Graduate

The purpose of this study was to provide an in-depth explanation of the development of coordinated services during the last four years at a selected number of Project Success pilot sites, and to identify critical factors that emerged which are associated in the literature with effective school-linked strategies. The research questions guiding this study were: (1) What common elements developed that crossed all selected sites, and what individual differences emerged among the sites? (2) What organizational structure emerged among the multi-agencies at the selected sites? (3) What collaborative processes emerged across selected sites that facilitated the project? (4) In what ways did parents become involved in the implementation of the project? (5) What barriers or support were encountered in establishing and operating the sites? The data collection for this study occurred in three parts: individual interviews with the Project Coordinators, focus group interviews with appropriate representatives of the pilot site projects, and notes from meetings of the Local Governing Board. A questionnaire that consisted of seven questions was used to collect data for this study. Materials gathered during in-depth interviews were transcribed and analyzed after the interviews were completed. First, the researcher read the transcribed interviews and hand coded the consistencies and emerging themes on a large chart. Second, a matrix was made of the hand coded data using a word processor. Third, the researcher used the Ethnograph Computer Software Program to organize and code the data. From this data, the researcher identified themes, common patterns, and important stories shared by the participants regarding their experiences with developing coordinated services to meet the needs of children and families during the last four years. A narrative summary was written for each selected pilot site. Recommendations for further research are provided at the conclusion of chapter five. / Ed. D.

published_or_final_version / abstract / Computer Science / Doctoral / Doctor of Philosophy

by Lau Chu Man. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1995. / Includes bibliographical references (leaves 76-83). / Chapter 1 --- Introduction --- p.1 / Chapter 2 --- Basic Notions --- p.13 / Chapter 3 --- Fast Knockout --- p.19 / Chapter 3.1 --- The Algorithm of Fast Knockout --- p.20 / Chapter 3.2 --- Complexity of the Fast Knockout Algorithm --- p.29 / Chapter 3.3 --- Summary --- p.35 / Chapter 4 --- k-Sortout --- p.36 / Chapter 4.1 --- A Brief Review of k-Sorting --- p.37 / Chapter 4.2 --- The Algorithm of k-Sortout --- p.47 / Chapter 4.3 --- Complexity of the k- Sortout Algorithm --- p.53 / Chapter 4.4 --- Summary --- p.58 / Chapter 5 --- General Sortout --- p.59 / Chapter 5.1 --- The General Algorithm of Sortout --- p.59 / Chapter 5.2 --- Complexity of Concentrators by the General Algorithm --- p.64 / Chapter 5.3 --- Summary --- p.69 / Chapter 6 --- Concluding Remarks --- p.70 / Chapter 6.1 --- Summary of Results --- p.70 / Chapter 6.2 --- Directions for Further Research --- p.73 / Bibliography --- p.76

by Chi-yin Tse. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1995. / Includes bibliographical references (leaves 118-[121]). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Video Compression and Transport --- p.2 / Chapter 1.2 --- VBR-CBR Adaptation of Video Traffic --- p.5 / Chapter 1.3 --- Research Contributions --- p.7 / Chapter 1.3.1 --- Spatial Smoothing: Video Aggregation --- p.8 / Chapter 1.3.2 --- Temporal Smoothing: A Control-Theoretic Study。 --- p.8 / Chapter 1.4 --- Organization of Thesis --- p.9 / Chapter 2 --- Preliminaries --- p.13 / Chapter 2.1 --- MPEG Compression Scheme --- p.13 / Chapter 2.2 --- Problems of Transmitting MPEG Video --- p.17 / Chapter 2.3 --- Two-layer Coding and Transport Strategy --- p.19 / Chapter 2.3.1 --- Framework of MPEG-based Layering --- p.19 / Chapter 2.3.2 --- Transmission of GS and ES --- p.20 / Chapter 2.3.3 --- Problems of Two-layer Video Transmission --- p.20 / Chapter 3 --- Video Aggregation --- p.24 / Chapter 3.1 --- Motivation and Basic Concept of Video Aggregation --- p.25 / Chapter 3.1.1 --- Description of Video Aggregation --- p.28 / Chapter 3.2 --- MPEG Video Aggregation System --- p.29 / Chapter 3.2.1 --- Shortcomings of the MPEG Video Bundle Scenario with Two-Layer Coding and Cell-Level Multiplexing --- p.29 / Chapter 3.2.2 --- MPEG Video Aggregation --- p.31 / Chapter 3.2.3 --- MPEG Video Aggregation System Architecture --- p.33 / Chapter 3.3 --- Variations of MPEG Video Aggregation System --- p.35 / Chapter 3.4 --- Experimental Results --- p.38 / Chapter 3.4.1 --- Comparison of Video Aggregation and Cell-level Multi- plexing --- p.40 / Chapter 3.4.2 --- Varying Amount of the Allocated Bandwidth --- p.48 / Chapter 3.4.3 --- Varying Number of Sequences --- p.50 / Chapter 3.5 --- Conclusion --- p.53 / Chapter 3.6 --- Appendix: Alternative Implementation of MPEG Video Aggre- gation --- p.53 / Chapter 3.6.1 --- Profile Approach --- p.54 / Chapter 3.6.2 --- Bit-Plane Approach --- p.54 / Chapter 4 --- A Control-Theoretic Study of Video Traffic Adaptation --- p.58 / Chapter 4.1 --- Review of Previous Adaptation Schemes --- p.60 / Chapter 4.1.1 --- A Generic Model for Adaptation Scheme --- p.60 / Chapter 4.1.2 --- Objectives of Adaptation Controller --- p.61 / Chapter 4.2 --- Motivation for Control-Theoretic Study --- p.64 / Chapter 4.3 --- Linear Feedback Controller Model --- p.64 / Chapter 4.3.1 --- Encoder Model --- p.65 / Chapter 4.3.2 --- Adaptation Controller Model --- p.69 / Chapter 4.4 --- Analysis --- p.72 / Chapter 4.4.1 --- Stability --- p.73 / Chapter 4.4.2 --- Robustness against Coding-mode Switching --- p.83 / Chapter 4.4.3 --- Unit-Step Responses and Unit-Sample Responses --- p.84 / Chapter 4.5 --- Implementation --- p.91 / Chapter 4.6 --- Experimental Results --- p.95 / Chapter 4.6.1 --- Overall Performance of the Adaptation Scheme --- p.97 / Chapter 4.6.2 --- Weak-Control verus Strong-Control --- p.99 / Chapter 4.6.3 --- Varying Amount of Reserved Bandwidth --- p.101 / Chapter 4.7 --- Conclusion --- p.103 / Chapter 4.8 --- Appendix I: Further Research --- p.103 / Chapter 4.9 --- Appendix II: Review of Previous Adaptation Schemes --- p.106 / Chapter 4.9.1 --- Watanabe. et. al.'s Scheme --- p.106 / Chapter 4.9.2 --- MPEG's Scheme --- p.107 / Chapter 4.9.3 --- Lee et.al.'s Modification --- p.109 / Chapter 4.9.4 --- Chen's Adaptation Scheme --- p.110 / Chapter 5 --- Conclusion --- p.116 / Bibliography --- p.118

by Kit-man Chan. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1994. / Includes bibliographical references (leaves 82-86). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Overview of Integrated Service Digital Networks --- p.1 / Chapter 1.2 --- Multirate Loss Networks --- p.5 / Chapter 1.3 --- Previous Work --- p.7 / Chapter 1.4 --- Organization --- p.11 / Chapter 1.5 --- Publications --- p.12 / Chapter 2 --- Call Admission in Multirate Loss Networks --- p.13 / Chapter 2.1 --- Introduction --- p.13 / Chapter 2.2 --- Two Adaptive Routing Rules --- p.15 / Chapter 2.3 --- Call Admission Policies --- p.17 / Chapter 2.4 --- Analysis of Call Admission Policies --- p.25 / Chapter 2.4.1 --- "The CS, LO, GB and the EB Policies" --- p.25 / Chapter 2.4.2 --- The DP Policy --- p.29 / Chapter 2.5 --- Performance Comparisons --- p.32 / Chapter 2.6 --- Concluding Remarks --- p.35 / Chapter 3 --- Least Congestion Routing in Multirate Loss Networks --- p.41 / Chapter 3.1 --- Introduction --- p.41 / Chapter 3.2 --- The M2 and MTB Routings --- p.42 / Chapter 3.2.1 --- M2 Routing --- p.43 / Chapter 3.2.2 --- MTB Routing --- p.43 / Chapter 3.3 --- Bandwidth Sharing Policies and State Aggregation --- p.45 / Chapter 3.4 --- Analysis of M2 Routing --- p.47 / Chapter 3.5 --- Analysis of MTB Routing --- p.50 / Chapter 3.6 --- Numerical Results and Discussions --- p.53 / Chapter 3.7 --- Concluding Remarks --- p.56 / Chapter 4 --- The Least Congestion Routing in WDM Lightwave Networks --- p.60 / Chapter 4.1 --- Introduction --- p.60 / Chapter 4.2 --- Architecture and Some Design Issues --- p.62 / Chapter 4.3 --- The Routing Rule --- p.66 / Chapter 4.4 --- Analysis of the LC Routing Rule --- p.67 / Chapter 4.4.1 --- Fixed Point Model --- p.67 / Chapter 4.4.2 --- Without Direct-link Priority --- p.68 / Chapter 4.4.3 --- With Direct-link Priority --- p.72 / Chapter 4.5 --- Performance Comparisons --- p.73 / Chapter 4.6 --- Concluding Remarks --- p.75 / Chapter 5 --- Conclusions and Future Work --- p.79 / Chapter 5.1 --- Future Work --- p.80

by Shum Kam Hong. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1992. / Includes bibliographical references (leaves 125-131). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Background --- p.1 / Chapter 1.2 --- Outline of the thesis --- p.6 / Chapter 1.3 --- Current Art in Packet Switching --- p.9 / Chapter 2 --- Management of Control Information --- p.17 / Chapter 2.1 --- Inter-node Exchange of Link Congestion Status --- p.21 / Chapter 2.2 --- Consistency of Control Information --- p.24 / Chapter 2.3 --- Alternate Format of Control Information --- p.26 / Chapter 3 --- Traffic Flow Control --- p.29 / Chapter 3.1 --- Control of Traffic Influx into the Network --- p.29 / Chapter 3.2 --- Control of Traffic Loading from the Node --- p.30 / Chapter 3.3 --- Flow Control for Connection Oriented Traffic --- p.32 / Chapter 3.4 --- Judgement of Link Status --- p.38 / Chapter 3.5 --- Starvation-free and Deadlock-free --- p.42 / Chapter 4 --- Call Set-up Algorithm Traffic Modelling --- p.47 / Chapter 4.1 --- Basic Algorithm --- p.47 / Chapter 4.2 --- Minimization of Bandwidth Overhead --- p.48 / Chapter 4.3 --- Two-way Transmission --- p.51 / Chapter 4.4 --- Traffic Modelling --- p.52 / Chapter 4.4.1 --- Aggregate Traffic Models --- p.53 / Chapter 4.4.2 --- Traffic Burstiness --- p.57 / Chapter 5 --- Parameters Tuning and Analysis --- p.76 / Chapter 5.1 --- Scheme I : Scout Pumping --- p.76 / Chapter 5.2 --- Scheme II : Speed-up Scout Pumping --- p.85 / Chapter 5.3 --- Blocking Probability --- p.90 / Chapter 5.4 --- Scout Stream Collision --- p.92 / Chapter 6 --- Simulation Modelling & Performance Evaluation --- p.96 / Chapter 6.1 --- The Network Simulator --- p.96 / Chapter 6.1.1 --- Simulation Event Scheduling --- p.97 / Chapter 6.1.2 --- Input Traffic Regulation --- p.100 / Chapter 6.1.3 --- Actual Offered Load --- p.101 / Chapter 6.1.4 --- Static and Dynamic Parameters --- p.103 / Chapter 6.2 --- Simulation Results --- p.107 / Chapter 7 --- Conclusions --- p.123 / Chapter A --- List of Symbols --- p.132

Wong, Po-Choi. / Summary in Chinese. / Thesis (Ph.D.)--Chinese University of Hong Kong, 1989. / Bibliography: leaves 156-164.

by Yeung Ming Sang. / Thesis (Ph.D.)--Chinese University of Hong Kong, 1994. / Includes bibliographical references (leaves 191-[201]). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Background --- p.1 / Chapter 1.1.1 --- Broadband Integrated Services Network --- p.1 / Chapter 1.1.2 --- ATM Switching Technology --- p.3 / Chapter 1.2 --- Broadband ATM Switching ´ؤ A Review --- p.4 / Chapter 1.2.1 --- Shared Memory Switches --- p.5 / Chapter 1.2.2 --- Shared Medium Switches --- p.5 / Chapter 1.2.3 --- Space-division Type Switches --- p.6 / Chapter 1.3 --- Motivation and Contributions --- p.13 / Chapter 1.4 --- Overview of the Thesis --- p.13 / Chapter 2 --- Pipeline Banyan Switch Architecture --- p.15 / Chapter 2.1 --- Switch Architecture --- p.15 / Chapter 2.2 --- Switch Operation --- p.17 / Chapter 2.3 --- Switch Design --- p.19 / Chapter 2.4 --- "Priority, Broadcasting and Multicasting Mechanisms" --- p.21 / Chapter 2.5 --- Switch Speed Reduction at the Control Plane --- p.23 / Chapter 3 --- Performance Evaluation of Pipeline Banyan --- p.27 / Chapter 3.1 --- Performance under Uniform and Independent Traffic Pattern --- p.27 / Chapter 3.1.1 --- Analysis of Packet Loss Performance --- p.27 / Chapter 3.1.2 --- Throughput Performance --- p.32 / Chapter 3.1.3 --- Delay Performance --- p.36 / Chapter 3.1.4 --- Comparison of Loss Performance of Banyan-type Networks --- p.37 / Chapter 3.1.5 --- Output Queueing Capability --- p.41 / Chapter 3.2 --- Performance of the Switch under Special Traffic Pattern --- p.45 / Chapter 3.2.1 --- Performance under Bursty Traffic --- p.45 / Chapter 3.2.2 --- Performance under Hot Spot Traffic --- p.48 / Chapter 3.2.3 --- Performance under Point-to-Point Traffic --- p.51 / Chapter 3.2.4 --- Performance under Permutation Traffic --- p.52 / Chapter 3.3 --- Switch Complexity Discussion --- p.54 / Chapter 4 --- Multi-Channel Pipeline Banyan (MCPB) --- p.57 / Chapter 4.1 --- Background --- p.57 / Chapter 4.2 --- Switch Architecture --- p.59 / Chapter 4.3 --- Performance Evaluation --- p.64 / Chapter 4.3.1 --- Packet loss probability --- p.64 / Chapter 4.3.2 --- Throughput performance --- p.69 / Chapter 4.3.3 --- Delay performance --- p.69 / Chapter 4.4 --- Application of MCPB --- p.71 / Chapter 4.4.1 --- ATM Cross-connect --- p.71 / Chapter 4.4.2 --- Switch Interconnection Fabric --- p.71 / Chapter 5 --- VLSI Implementation --- p.75 / Chapter 5.1 --- Outline of a typical ATM switching system --- p.75 / Chapter 5.1.1 --- Line Interface Module --- p.75 / Chapter 5.1.2 --- System Manager Module --- p.77 / Chapter 5.1.3 --- Switch Module --- p.78 / Chapter 5.2 --- "VLSI Design Technology, Procedures and Tools" --- p.78 / Chapter 5.2.1 --- Design Technology --- p.78 / Chapter 5.2.2 --- Procedures and Tools --- p.79 / Chapter 5.3 --- Logic Design of ATM Switch Module --- p.80 / Chapter 5.3.1 --- Switching Element in Control Plane --- p.80 / Chapter 5.3.2 --- Switching Element in Data Plane --- p.86 / Chapter 5.3.3 --- Clock Generator for Synchronization --- p.93 / Chapter 5.3.4 --- Schematic of Control Plane --- p.98 / Chapter 5.3.5 --- Schematic of Data Plane --- p.98 / Chapter 5.3.6 --- Timing Diagrams --- p.98 / Chapter 5.4 --- Chip Summary --- p.107 / Chapter 5.5 --- Experiences --- p.109 / Chapter 5.5.1 --- Core Size Limitation --- p.109 / Chapter 5.5.2 --- Pin Count Limitation --- p.110 / Chapter 5.5.3 --- Speed Limitation --- p.111 / Chapter 5.5.4 --- Other Design Considerations --- p.111 / Chapter 5.6 --- Discussions --- p.112 / Chapter 6 --- Dynamic Priority Schemes for Fast Packet Switches --- p.114 / Chapter 6.1 --- Motivation --- p.114 / Chapter 6.2 --- Switch Architecture --- p.118 / Chapter 6.3 --- QCPD: Queueing Controlled Priority Discipline --- p.121 / Chapter 6.3.1 --- Algorithm QCPD --- p.121 / Chapter 6.4 --- BCPD: Blocking Controlled Priority Discipline --- p.122 / Chapter 6.4.1 --- Algorithm BCPD_FT --- p.122 / Chapter 6.4.2 --- Delay Guarantee by Algorithm BCPD_FT --- p.123 / Chapter 6.4.3 --- Algorithm BCPD_DT --- p.126 / Chapter 6.4.4 --- Delay Guarantee by Algorithm BCPD_DT --- p.128 / Chapter 6.5 --- HCPD: Hybrid Controlled Priority Discipline --- p.134 / Chapter 6.5.1 --- Algorithms HCPD_FT and HCPD_DT --- p.135 / Chapter 6.6 --- Performance Studies --- p.136 / Chapter 6.6.1 --- Performance Comparison of the Priority Schemes --- p.136 / Chapter 6.6.2 --- Cell Loss Performance of HCPD_DT --- p.140 / Chapter 6.6.3 --- Input Queue Distribution of HCPD_DT --- p.142 / Chapter 6.6.4 --- Delay Bound of HCPD_DT --- p.144 / Chapter 6.6.5 --- Performance of HCPD_DT under Priority Traffic --- p.148 / Chapter 6.7 --- The use of HCPD_DT in Pipeline Banyan --- p.152 / Chapter 6.8 --- Conclusion --- p.153 / Chapter 7 --- Summary and Future Work --- p.155 / Chapter 7.1 --- Summary --- p.155 / Chapter 7.2 --- Future Work --- p.156 / Chapter A --- Verilog HDL descriptions of 16x16 Pipeline Banyan --- p.158 / Chapter B --- User's Guide of 16x16 Pipeline Banyan Chip Set --- p.182 / Chapter B.l --- Specification --- p.182 / Chapter B.2 --- Control Plane Chip and Data Plane Chip Pinout --- p.183 / Chapter B.2.1 --- Control Plane Chip Pinout --- p.183 / Chapter B.2.2 --- Data Plane Chip Pinout --- p.183 / Chapter B.3 --- Signal Descriptions --- p.186 / Chapter B.3.1 --- Signal Descriptions of Control Plane Chip --- p.186 / Chapter B.3.2 --- Signal Descriptions of Data Plane Chip --- p.187 / Chapter B.4 --- Connection Examples --- p.188 / Bibliography --- p.191

Lau Tsz-ming. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2000. / Includes bibliographical references (leaves 57-[61]). / Abstracts in English and Chinese. / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Integrated Services Architecture --- p.2 / Chapter 1.2 --- Cross-path Switch --- p.4 / Chapter 1.2.1 --- Path Switching --- p.5 / Chapter 1.3 --- Organization of Thesis --- p.9 / Chapter 2 --- Module Architecture --- p.10 / Chapter 2.1 --- Introduction --- p.10 / Chapter 2.2 --- Notable Features --- p.11 / Chapter 3 --- Connection Admission Control and Resource Allocation --- p.14 / Chapter 3.1 --- Introduction --- p.14 / Chapter 3.2 --- Connection Admission Control --- p.15 / Chapter 3.2.1 --- Guaranteed Service --- p.15 / Chapter 3.2.2 --- Controlled-Load Service --- p.18 / Chapter 3.3 --- Resource Allocation --- p.27 / Chapter 4 --- Resource Management --- p.31 / Chapter 4.1 --- Introduction --- p.31 / Chapter 4.2 --- Scheduling Algorithm --- p.32 / Chapter 4.2.1 --- Input and Output Module --- p.32 / Chapter 4.2.2 --- Central Module --- p.34 / Chapter 4.3 --- Buffer Management --- p.39 / Chapter 4.3.1 --- Buffer Partitioning --- p.40 / Chapter 4.3.2 --- Dicard Policy --- p.40 / Chapter 5 --- Design Issue of Cross-path Switch --- p.43 / Chapter 5.1 --- Introduction --- p.43 / Chapter 5.2 --- Stability Condition --- p.44 / Chapter 5.3 --- Supplementary Admission Control Scheme --- p.46 / Chapter 5.4 --- Simulation --- p.50 / Chapter 6 --- Conclusion --- p.55 / Bibliography --- p.57