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Performance evaluation of currently available VLSI implementations satisfying U-interface requirements for an ISDN in South Africa.Kaplan, Paul Charl January 1990 (has links)
A project report submitted to the Faculty of Engineering, University of the
Witwatersrand, Johannesburg, in partial fulfilment of the requirements for the
degree of Master of Science in Engineering. / This project report examines the performance of three VLSI U-interface implementations
satisfying the requirements of Basic Access on an ISDN.
The systems evaluated are the Intel 89120,Siemens PEB2090 and STC DSP144, operating
on 2BIQ, MMS4J and SU32 line codes respectively.
Before evaluating the three abovementioned systems, a review of the underlying principles
of U-interface technology is presented. Included in the review are aspects of transmission
line theory, line coding, echo-cancellation, decision feedback equalisation, and pulse density
modulation. The functional specifications of the three systems are then presented followed
by a practical evaluation of each system.
As an aid to testing the transmission systems, an evaluation board has been designed and
built. The latter provides the necessary functionality to correctly activate each system, as
well as the appropriate interfacing requirements for the error-rate tester.
The U-interface transmission systems are evaluated on a number of test-loops, comprising
sections of cable varying in length and gauge. Additionally, impairments are injected into
data-carrying cables, in order to test the performance of each system in the presence of
noise. The results of each test are recorded and analysed.
Finally, a recommendation is made in favour of the 2BIQ U-interface. It is shown to offer
superior transmission performance, at the expense of a slightly higher transmit-power level. / Andrew Chakane 2018
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Critical Business Decisions for Integrated ServicesBailey, Joseph P., McKnight, Lee W., Sharifi, Husham S. January 1998 (has links)
No description available.
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Application of ISDN (integrated services digital network) :Hung, Katherine S. F. Unknown Date (has links)
Thesis (MAppSc Project Management)--University of South Australia, 1993
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The integration of voice within a digital networkCalnan, Roger Stuart January 1988 (has links)
No description available.
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Internetworking the defense data network with an integrated services digital networkChristoffersen, Daniel Arthur, 1964- January 1988 (has links)
The motivation behind this thesis is to develop a procedure for internetworking the Defense Data Network (DDN) with an Integrated Services Digital Network (ISDN). To accomplish this internetworking problem an integrated gateway must be designed to compensate for incompatibilities between the two networks. This thesis approaches this problem by giving a description of the two networks, DDN and ISDN, and also presenting a general approach to gateway design. This information is then combined into a detailed procedure for implementing a gateway to internetwork the DDN and ISDN. This is followed by a discussion of the practical aspects of the DDN/ISDN internetworking problem.
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ATM based service independent systemJahromi, Masaud M. J. January 2001 (has links)
No description available.
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An integrated broadband concentration/distribution network for multimedia application compatible with the Hybrid Fiber-Coax (HFC) architecture.January 1995 (has links)
by Ringo Wing-kwan Lam. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1995. / Includes bibliographical references (leaves 83-[88] ). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Multimedia Network Requirement --- p.2 / Chapter 1.2 --- 100-Mbps Network Proposal --- p.2 / Chapter 1.3 --- Broadband Network on HFC Architecture --- p.4 / Chapter 1.4 --- The BEBP MAC Protocol --- p.5 / Chapter 1.5 --- Scope of the Thesis --- p.5 / Chapter 2 --- The MAC Protocol --- p.7 / Chapter 2.1 --- Fast Polling Protocol --- p.9 / Chapter 2.1.1 --- Round Robin Polling --- p.10 / Chapter 2.1.2 --- Binary Exponential Backoff Polling --- p.11 / Chapter 2.2 --- Protocol Design --- p.13 / Chapter 2.2.1 --- Lessons learnt from IEEE 802 LAN and Ethernet --- p.15 / Chapter 2.2.2 --- Protocol Data Unit --- p.17 / Chapter 3 --- Performance Analysis --- p.19 / Chapter 3.1 --- The Simulation --- p.19 / Chapter 3.2 --- Round Robin vs. BEBP --- p.24 / Chapter 3.3 --- Size of BEBP Network --- p.30 / Chapter 3.4 --- BEBP with Different Tx FIFO Size --- p.31 / Chapter 3.5 --- Limitation of the Host Bus Transfer Rate --- p.32 / Chapter 3.6 --- Performance with Different Packet Size --- p.36 / Chapter 4 --- Network Architecture --- p.40 / Chapter 4.1 --- Dual Bus Network Architecture --- p.40 / Chapter 4.2 --- Star Network Architecture --- p.41 / Chapter 4.3 --- Compatibility with Existing Networks --- p.42 / Chapter 4.3.1 --- Compatibility with 10BaseT UTP Star Network --- p.42 / Chapter 4.3.2 --- Compatibility with 10Base2 Coax Bus Network --- p.44 / Chapter 4.3.3 --- Compatibility with the HFC Coax Tree Network --- p.47 / Chapter 5 --- Implementation --- p.50 / Chapter 5.1 --- Physical Layer --- p.50 / Chapter 5.2 --- MAC Layer --- p.52 / Chapter 5.2.1 --- Continuous Mode Datalink --- p.53 / Chapter 5.2.2 --- Burst Mode Datalink --- p.53 / Chapter 5.2.3 --- The 9-bit Polling Commands --- p.54 / Chapter 5.3 --- Design of the NIC --- p.56 / Chapter 5.3.1 --- Transmitter Modules --- p.59 / Chapter 5.3.2 --- Receiver Module --- p.61 / Chapter 5.3.3 --- Serial Interface --- p.63 / Chapter 5.4 --- Design of the Hub/Router --- p.67 / Chapter 5.4.1 --- CUMLAUDE NET --- p.67 / Chapter 5.4.2 --- Hub/Router --- p.69 / Chapter 5.4.3 --- Concentrator --- p.72 / Chapter 5.5 --- Software - Device Driver --- p.73 / Chapter 5.6 --- Testing of NIC --- p.76 / Chapter 5.6.1 --- Packet Error Rate Testing --- p.77 / Chapter 5.6.2 --- UDP Transfer Rate Testing --- p.78 / Chapter 5.6.3 --- Other Applications --- p.79 / Chapter 6 --- Conclusion --- p.81 / Bibliography --- p.83 / Chapter A --- Abbreviation --- p.89 / Chapter B --- Simulation Source Code --- p.93 / Chapter C --- Simulation Results --- p.98 / Chapter D --- Circuit Diagram --- p.122 / Chapter D.l --- Network Interface Card --- p.123 / Chapter D.2 --- Router/Hub - Ring A Module --- p.123 / Chapter D.3 --- Router/Hub - Ring B Module --- p.123 / Chapter D.4 --- Router/Hub - Hub Module --- p.123 / Chapter D.5 --- Router/Hub - Power Module --- p.123 / Chapter D.6 --- Concentrator - Back Plate --- p.123 / Chapter D.7 --- Concentrator - Hub Connecting Module --- p.123 / Chapter D.8 --- Concentrator - Node Connecting Module --- p.123 / Chapter E --- PLD Source Code --- p.132 / Chapter E.1 --- GAL20V8 for NIC --- p.132 / Chapter E.2 --- Lattise ispLSI for NIC --- p.132 / Chapter E.3 --- GAL20V8 for Concentrator --- p.132 / Chapter F --- DSP Program --- p.140 / Chapter G --- Device Driver --- p.144 / Chapter G.1 --- The Network Driver : nic.c --- p.144 / Chapter G.2 --- The Header File : nic.h --- p.144 / Chapter H --- Testing Program --- p.151 / Chapter H.1 --- Packet Error Rate Testing Program --- p.151 / Chapter H.2 --- UDP Rate Testing Program --- p.151 / Chapter H.2.1 --- Datagram Client : dgcli.c --- p.151 / Chapter H.2.2 --- Datagram Server : dgecho.c --- p.151 / Chapter H.2.3 --- UDP Client : udpcli.c --- p.151 / Chapter H.2.4 --- UDP Server : udpserv.c --- p.151 / Chapter H.2.5 --- The Header File : inet.h --- p.151
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Gateway design for a high speed multimedia integrated network.January 1994 (has links)
by Chung Kong Ngai. / Thesis (M.Sc.)--Chinese University of Hong Kong, 1994. / Includes bibliographical references (leaves 84-86). / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Introduction to CUM LAUDE NET --- p.1 / Chapter 1.2 --- Interconnections with Other Networks --- p.3 / Chapter 1.3 --- Introduction to FDDI --- p.4 / Chapter 1.4 --- Scope of the Thesis --- p.4 / Chapter 2 --- Overview of CUM LAUDE NET --- p.7 / Chapter 2.1 --- Network Architecture of CUM LAUDE NET --- p.7 / Chapter 2.2 --- Level One Network Architecture --- p.9 / Chapter 2.3 --- Level One Router --- p.11 / Chapter 2.3.1 --- fault protection --- p.12 / Chapter 2.4 --- Host and Network Interface Card --- p.13 / Chapter 2.5 --- Protocol used in CUM LAUDE NET --- p.13 / Chapter 2.5.1 --- protocol layering --- p.14 / Chapter 2.5.2 --- packet format --- p.16 / Chapter 2.5.3 --- fast packet routing protocol --- p.17 / Chapter 2.5.4 --- ACTA protocol --- p.19 / Chapter 2.6 --- Network Services --- p.21 / Chapter 3 --- Overview of FDDI --- p.22 / Chapter 3.1 --- FDDI Architectural Model --- p.23 / Chapter 3.1.1 --- FDDI stations --- p.24 / Chapter 3.2 --- FDDI station layering --- p.27 / Chapter 3.2.1 --- PMD (Physical Medium Dependent) Layer --- p.28 / Chapter 3.2.2 --- PHY (Physical Layer) --- p.28 / Chapter 3.2.3 --- MAC (Medium Access Control) Layer --- p.29 / Chapter 3.2.4 --- SMT (Station Management) --- p.31 / Chapter 3.3 --- FDDI MAC Protocol --- p.32 / Chapter 3.3.1 --- capacity allocation --- p.32 / Chapter 3.4 --- FDDI Applications --- p.36 / Chapter 3.5 --- FDDI II --- p.39 / Chapter 4 --- Device driver of the FDDI Adapter --- p.41 / Chapter 4.1 --- Characteristics of the FDDI Adapter --- p.42 / Chapter 4.2 --- Hardware Overview of the Adapter --- p.42 / Chapter 4.3 --- Structure of the Device Driver --- p.43 / Chapter 4.3.1 --- fddi_init() entry point --- p.46 / Chapter 4.3.2 --- fddi_open() entry point --- p.46 / Chapter 4.3.3 --- fddi_hard_header() entry point --- p.46 / Chapter 4.3.4 --- fddi_rebuild_header() entry point --- p.49 / Chapter 4.3.5 --- fddi_close() entry point --- p.49 / Chapter 4.3.6 --- fddi_start_xmit() entry point --- p.50 / Chapter 4.3.7 --- interrupt handler fddi_interrupt() --- p.51 / Chapter 4.4 --- Operation of the transmit buffer memory ring --- p.52 / Chapter 4.5 --- Operation of the receive buffer memory ring --- p.54 / Chapter 4.6 --- Communication with the Adapter --- p.57 / Chapter 5 --- Design and Implementation of the Gateway --- p.58 / Chapter 5.1 --- Detail design of the Gateway --- p.60 / Chapter 5.2 --- Protocol Converter for ARP --- p.62 / Chapter 5.3 --- Protocol Convertor for IP --- p.68 / Chapter 5.3.1 --- forwarding IP frame --- p.70 / Chapter 5.3.2 --- fragmentation of IP frame --- p.73 / Chapter 5.4 --- Address Routing Table --- p.76 / Chapter 5.5 --- Performance results of the Gateway --- p.79 / Chapter 5.6 --- Future Development --- p.81 / Chapter 6 --- Conclusion --- p.82 / Bibliography --- p.84
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Design, analysis and implementation of integrated services networks.January 1993 (has links)
by Wong, Chan-foon. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1993. / Includes bibliographical references (leaves 59-67 (1st gp.)). / Chapter Chapter I --- Introduction --- p.1 / Chapter 1.1 --- Background --- p.1 / Chapter 1.2 --- Traffic Characteristics --- p.2 / Chapter 1.3 --- Related Works --- p.5 / Chapter Chapter II --- Integrated Services Protocol (ISP) --- p.7 / Chapter 2.1 --- Ethernet --- p.7 / Chapter 2.2 --- ISP Description --- p.9 / Chapter 2.2.1 --- Voice Communications Characteristics --- p.9 / Chapter 2.2.2 --- Voice Packet Format --- p.12 / Chapter 2.2.3 --- Call Management --- p.13 / Chapter 2.4.4 --- Voice Packet Transmission Protocol --- p.14 / Chapter 2.4.5 --- Error Handling --- p.16 / Chapter Chapter III --- Protocol Studies --- p.17 / Chapter 3.1 --- Simulation Model And Parameters --- p.17 / Chapter 3.2 --- Voice Loss --- p.18 / Chapter 3.3 --- Data Delay --- p.20 / Chapter 3.4 --- Maximum Number Of Active Voice Stations --- p.22 / Chapter 3.5 --- Summary --- p.23 / Chapter Chapter IV --- Implementation --- p.24 / Chapter 4.1 --- System Platform --- p.24 / Chapter 4.2 --- Integrated Services Adapter (ISA) --- p.25 / Chapter 4.2.1 --- Hardware Design --- p.26 / Chapter 4.3 --- Voice on Ethernet Adapter (VEA) --- p.29 / Chapter 4.3.1 --- Hardware Design --- p.29 / Chapter 4.3.2 --- Software Design --- p.31 / Chapter 4.3.2.1 --- Programming The VEA --- p.32 / Chapter 4.3.2.2 --- Software Development Under DOS --- p.35 / Chapter 4.3.2.3 --- Software Development Under Linux --- p.37 / Chapter 4.4 --- Summary --- p.41 / Chapter Chapter V --- Implementation Results --- p.42 / Chapter 5.1 --- Frequency Response --- p.43 / Chapter 5.2 --- Distortion --- p.44 / Chapter 5.3 --- Amplification and Linearity --- p.45 / Chapter 5.4 --- Voice Quality With Different Voice Packet Sizes --- p.46 / Chapter 5.5 --- Voice Loss Under Various Data Loadings --- p.47 / Chapter Chapter VI --- Implementation Experiences --- p.49 / Chapter 6.1 --- CPU Bottle-neck --- p.49 / Chapter 6.2 --- Data Bus Bottle-neck --- p.50 / Chapter 6.3 --- Operating System --- p.50 / Chapter Chapter VII --- Future Works --- p.52 / Chapter 7.1 --- Enhancement of ISA --- p.52 / Chapter 7.2 --- Extensions To Other Networks --- p.53 / Chapter 7.3 --- A New Architecture For Future Multimedia Workstation --- p.54 / Chapter Chapter VIII --- Conclusions --- p.57 / Bibliography --- p.59 / Appendices --- p.A.l / Appendix A: Detailed Circuit Designs --- p.A.2 / Appendix B: Detailed Software Designs --- p.A.5 / Appendix C: Schematic Diagrams --- p.A.15 / Appendix D: Program Listings --- p.A.23
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Control structures and techniques for broadband-ISDN communication systemsPitsillides, Andreas, Andreas.Pitsillides@ucy.ac.cy January 1993 (has links)
A structured organisation of tasks, possibly hierarchical, is necessary in a BISDN network due to the complexity of the system, its large dimension and its physical distribution in space. Feedback (possibly supplemented by feedforward) control has an essential role in the effective and efficient control of BISDN. Additionally, due to the nonstationarity of the network and its complexity, a number of different (dynamic) modelling techniques are required at each level of the hierarchy. Also, to increase the efficiency of the network and allow flexibility in the control actions (by extending the control horizon) the (dynamic) tradeoff between service-rate, buffer-space, cell-delay and cell-loss must be exploited. In this thesis we take account of the above and solve three essential control problems, required for the effective control of BISDN. These solutions are suitable for both stationary and nonstationary conditions. Also, they are suitable for implementation in a decentralised coordinated form, that can form a part of a hierarchical organisation of control tasks. Thus, the control schemes aim for global solutions, yet they are not limited by the propagation delay, which can be high in comparison to the dynamics of the controlled events.
Specifically, novel control approaches to the problems of Connection Admission Control (CAC), flow control and service-rate control are developed. We make use of adaptive feedback and adaptive feedforward control methodologies to solve the combined CAC and flow control problem. Using a novel control concept, based on only two groups of traffic (the controllable and uncontrollable group) we formulate a problem aimed at high (unity) utilisation of resources while maintaining quality of service at prescribed levels. Using certain assumptions we have proven that in the long term the regulator is stable and that it converges to zero regulation error. Bounds on operating conditions are also derived, and using simulation we show that high utilisation can be achieved as suggested by the theory, together with robustness for unforeseen traffic connections and disconnections. Even with such a high efficiency and strong properties on the quality of service provided, the only traffic descriptor required from the user is that of the peak rate of the uncontrollable traffic.
A novel scheme for the dynamic control of service-rate is formulated, using feedback from the network queues. We use a unified dynamic fluid flow equation to describe the virtual path (VP) and hence formulate two illustrative examples for the control of service-rate (at the VP level). One is a nonlinear optimal multilevel implementation, that features a coordinated decentralised solution. The other is a single level implementation that turns out to be computationally complex. Therefore, for the single level implementation the costate equilibrium solution is also derived. For the optimal policies derived, we discuss their implementation complexity and provide implementable solutions. Their performance is evaluated using simulation. Additionally, using an ad hoc approach we have extended previous published works on the decentralised coordinated control of large scale nonlinear systems to also deal with time-delayed systems.
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