Region detection can be defined as identifying connected components in an image. Connected component labelling is an important part of performing feature extraction. Industrial applications performing online image analysis may require a real-time implementation of a region labelling algorithm (typically processing 30 frames per second). Using application specific hardware or VLSI implementations to solve the problem sacrifices the ability to alter the design tradeoffs dynamically. General purpose software platforms are considerably slower for the task. While the massively parallel machines can accomplish the job without sacrificing the general purpose nature, they are highly un-economical. This research discusses an algorithm which was implemented on a FPGA-based reprogrammable hardware platform and demonstrates the effectiveness of custom computing platforms for high performance real-time image processing. The input to the system is VHDL, so the design can be modified very easily. Also, a variety of applications can be run on the system unlike application specific hardware or VLSI implementations. / Master of Science