In this present world there is a huge requirement for high data rates and less powerconsumption in mobile networking. To achieve this one need to build a highly efficientpower amplifiers which is the most power consuming component in transmitterfront end. Most of the power amplifiers are highly efficient at higher output powerlevels and achieving the similar efficiency at average or back-off power levels is challenging.Efficient PA architectures have been proposed in recent decades and onesuch architecture is the Load Modulated Balanced Amplifier (LMBA). All the existingLMBA designs have been implemented using the discrete components and GaNbased PA’s using Transmission Line (TL) for base-station applications which has adisadvantage of larger footprint. The main purpose of this thesis is to implementthe same idea in CMOS by replacing the discrete components with their lumpedcounterparts. In this work cascode amplifiers biased in deep class AB were implementedas the main and control amplifiers of LMBA. The circuit was implementedin TSMC 0.18 μm process. With on-chip inductor losses, for LMBA with controlsource, at 9 dB back-off and at center frequency of 2 GHz, the PAE is 22% with outputpower of 17 dBm and at maximum power of 23 dBm the PAE was close to 32%while PAE was 16% without load modulation. For LMBA with control amplifier, at6 dB back-off, the PAE is 27% compared to 19% for a reference amplifier and withload modulation, maximum power of 25.6 dBm. For DLMBA with inductor lossesat 6 dB OBO, a PAE of 25.3% was achieved compared to 20.2% for a referenceamplifier without load modulation, and load optimized for peak PAE, a absolutePAE improvement of 5.1% or a relative PAE improvement of 25.2%. / I dagens värld finns det stora krav på höga datahastigheter och lägre strömförbrukningi mobilnätverk. För att uppnå detta måste man bygga en mycket effektiveffektförstärkare (power amplifier, PA), som är den komponent i sändaren medhögst strömförbrukning. De flesta PA är mycket effektiva vid högre uteffektnivåermen att uppnå samma effektivitet vid genomsnittliga eller neddragna (back-off) effektnivåerär utmanande. Effektiva PA-arkitekturer har föreslagits under de senastedecennierna och en av de senaste arkitekturen är den last-modulerade balanseradeförstärkaren (Load Modulated Balanced Amplifier, LMBA). Alla befintliga LMBAkonstruktionerhar implementerats med diskreta komponenterna och GaN-baseradePA för basstationer och använder transmissionsledare som upptar stor yta, en nackdel.Huvudsyftet med denna avhandling är att implementera samma idé i CMOSgenom att ersätta de diskreta komponenterna med deras lumpade motsvarigheter.I detta arbete användes kaskodförstärkare, förspända i deep-class AB, som huvudochstyrförstärkare för en LMBA. Kretsen implementerades i TSMC 0.18 m-process.För en LMBA med styrkälla och induktorförluster på chip, 9 dB back-off och vidcenterfrekvensen 2 GHz, uppnåddes 22 % PAE vid 17 dBm uteffekt och 32 % PAEvid den maximala uteffekt på 23 dBm. Utan lastmodulering var PAE 16 %. För enLMBA med kontrollförstärkare och 6 dB back-off, uppnåddes 27 % PAE jämförtmed 19 % för en referensförstärkare, och med lastmodulering en maximal effekt på25,6 dBm. För en DLMBA med induktorförluster uppnåddes vid 6 dB back-off 25,3% PAE jämfört med 20,2 % för en referensförstärkare utan lastmodulering och lastoptimerad för högsta PAE, vilket gör en absolut PAE-förbättring på 5,1 % eller enrelativ PAE-förbättring på 25,2 %.

With the increase in demand for compact and high data rate communication systems, there is a need for high efficiency with modulated signals (PAPR 5-10 dB) for base-station power amplifiers. One of the famous architectures used to achieve this is Doherty architecture. The architecture has recently been extended to the Load Modulated Balanced Amplifier (LMBA) concept, where a separate integrated amplifier generates the control signal for load modulation. Almost all published studies are concerned with discrete "PCB-based" solutions for LMBA. In a recent study [1], the potential of designing an integrated LMBA in 0.18 μm CMOS has been evaluated. The main limitation concerning losses and area comes from the quadrature couplers, consisting of either two or four inductors. Using active inductors in the coupler design may be possible to obtain a more cost-effective solution. However, several aspects must be taken into consideration. One is that the power consumption of the active inductor should not exceed the power loss of the passive inductor. Another one is the ability to handle high power signals (high voltage swing), corresponding to 10-15 dBm at the input of the amplifier. The main objective of this thesis is to implement a hybrid coupler using an active inductor based on the theory of gyrators. The circuits were implemented using TSMC 0.18 μm process. The coupler and the active inductor are designed to operate at 2 GHz centre frequency. The active inductor implemented is considerably linear up to 12 dBm. The coupler has an input reflection coefficient (S11) of -26 dB, the transmission coefficient (S21) of -4.4 dB, and a coupling coefficient (S31) of -2.4 dB. The coupler shows good coupling and isolation characteristics. The phase difference between the through-port and the coupled-port of the coupler is 92°. As a result, when used as a power divider at the input of the power amplifiers, a PAE (Power Added Efficiency) of 63% and output power of 23 dBm is obtained at an input power of 12 dBm.