The objective of the proposed research is to develop a framework for the signal reconstruction algorithm with sub-Nyquist sampling rate and the low-cost hardware design in system level. A further objective of the proposed research is to monitor the device-under-test (DUT) and to adapt its behaviors. The key contribution of this research is that the high-speed signal acquisition is done by direct subsampling. As the signal is directly sampled without any front-end radio-frequency (RF) components such as mixers or filters, the cost of hardware is reduced. Furthermore, the distortion and the nonlinearity from the RF components can be avoided. The first proposed work is wideband signal reconstruction by dual-rate time-interleaved subsampling hardware and Multi-coset signal reconstruction. Using the combination of the dual-rate hardware and the multi-coset algorithm, the number of sampling channel is significantly reduced compared to the conventional multi-coset works. The second proposed work is jitter tracking by accurate period estimation with incoherent subsampling. In this work, the long-term jitter in PRBS is tracked without hardware synchronization and clock-data-recovery (CDR) circuits. The third proposed work is eye-monitoring and time-domain-reflectometry (TDR) by monobit receiver signal reconstruction. Using a monobit receiver based on incoherent subsampling and time-variant threshold signal, high resolution of reconstructed signal in both amplitude and time is achieved. Compared to a multibit-receiver, the scalability of the test-system is significantly increased.

The proliferation of wireless communication devices in the recent past has increased the pressure on semiconductor manufacturers to produce quality radio frequency (RF) modules and systems at a low cost. This entails reducing their test cost as well, since the cost of testing modern RF devices can be up to 40% of their manufacturing cost. The high test cost of these devices can be mainly attributed to (a) the expensive nature of the RF automated test equipment (ATE) used to perform wafer-level and fully packaged RF functionality tests, (b) limited test point access for the application and capture of test signals, (c) the long test development and application times, and (d) the lack of diagnostic tools to evaluate and improve the performance of loadboards and test resources in high-volume tests. In this thesis, a framework for the efficient production testing of high-performance RF modules and systems using low-cost ATE is presented. This framework uses low-speed, low-resolution test resources to generate reliable tests for complex RF systems. Also, the test resources will be evaluated and improved ahead of high-volume tests to improve test yield and throughput. The components of the proposed framework are: (1) Genetic ATPG for reliable test stimulus generation using low-resolution test resources: A genetic algorithm (GA) based automatic test pattern generator (ATPG) to optimize the alternate test stimulus for reliable testing of complex RF systems using low-resolution, low-cost test resources. These test resources may be on-chip or off-chip. (2) Concurrent voltage/current alternate test methodology: A testing framework for efficiently testing the high-frequency specifications of RF systems using low-frequency spectral and/or transient current signatures. Suitable on-chip and/or off-chip design-for-test (DfT) resources are used to enable the source and capture operations at lower frequencies. (3) Loadboard checker: A checker tool to accurately characterize/diagnose the DfT resources on the RF loadboards used to enable test of RF devices/systems using low-cost ATE. (4) Advanced test signal processing algorithms: The performance of the low-cost ATE resources, in terms of their linearity/resolution, will be evaluated and improved to enable the accurate capture of the test response signals.