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Delay-sensitive branch predictors for future technologiesJiménez, Daniel Angel, January 2002 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2002. / Vita. Includes bibliographical references. Available also from UMI Company.
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Delay-sensitive branch predictors for future technologies /Jiménez, Daniel Angel, January 2002 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2002. / Vita. Includes bibliographical references (leaves 137-145). Available also in a digital version from Dissertation Abstracts.
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Architectures for floating-point divisionNikmehr, Hooman. January 2005 (has links)
Thesis (Ph.D.) --University of Adelaide, School of Electrical and Electronic Engineering, 2005. / Bibliography: pages 241-258. Also available in print form.
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Design of wide-issue high-frequency processors in wire delay dominated technologiesMurukkathampoondi, Hrishikesh Sathyavasu, Burger, Douglas C., Chase, Craig M., January 2004 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2004. / Supervisors: Douglas C. Burger and Craig M. Chase. Vita. Includes bibliographical references. Also available from UMI.
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A hybrid-scheduling approach for energy-efficient superscalar processors /Valluri, Madhavi Gopal, John, Lizy Kurian, January 2005 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2005. / Supervisor: Lizy John. Vita. Includes bibliographical references.
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Register file optimizations for superscalar microprocessorsErgin, Oǧuz. January 2005 (has links)
Thesis (Ph. D.)--State University of New York at Binghamton, Department of Computer Science, 2005. / Includes bibliographical references.
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Low-energy instruction cache architecture /Ali, Kashif. January 2006 (has links)
Thesis (M.Sc.)--York University, 2006. Graduate Programme in Computer Science. / Typescript. Includes bibliographical references (leaves 96-107). Also available on the Internet. MODE OF ACCESS via web browser by entering the following URL: http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&res_dat=xri:pqdiss&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&rft_dat=xri:pqdiss:MR19752
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Design and implementation of an asynchronous version of the MIPS R3000 microprocessor /Siers, Scott. January 1993 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 1993. / Typescript. Includes bibliographical references (leaf 81).
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Scalable hardware memory disambiguationSethumadhavan, Lakshminarasimhan, January 1900 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.
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Design and implementation of an asynchronous version of the MIPS R3000 microprocessor /Johnson, Kevin. January 1994 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 1994. / Typescript. Includes bibliographical references (leaves 80-81).
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