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Two-Stage Operational Amplifier Design by Using Direct and Indirect Feedback CompensationsZhang, Jiayuan 21 June 2021 (has links)
This paper states the stability requirements of the amplifier system, and then presents, and summarizes, the classic two stage CMOS Op-Amp design by employing several popular frequency compensation techniques including traditional Miller compensation, nulling resistor, voltage buffer, and current buffer. The advantages and disadvantages of all these compensation strategies are evaluated based on a standard performance which has a 70dB DC gain, a 60◦ phase margin, a 25MHz gain bandwidth, and a slew rate of 20 V/us requirements. All the designs and simulation results are based on a 180mm 1.8 V standard TSMC CMOS technology. Ultimately, the traditional Miller compensated Op-Amp (a single compensation capacitor amplifier) cannot meet all the requirements but all other techniques could with also a boost of performance in various aspects. / Master of Science / Two-stage CMOS operational amplifier has two input pins and one output pin. it is used to amplify the differential inputs signal and transfer it to the output side. Usually the input signals are too weak to be processed by the rest of the system units. So the Op-Amp can amplify the weak input signals which then can either be further modified for some specific applications by the rest units of the system or be the final output of this entire system. The role of the Op-Amp in analog and digital systems is as the role of transformers in the power system. So the output signal is required to have fast and stable responses to the inputs. This paper states some standard requirements of the Op-Amp in aspects of gain, stability, and operating frequency. Due to the classic design of two-stage Op-Amp has poor performance of stability and operating frequency, some compensation techniques are applied as the feedback networks to improve its performance. These techniques include traditional Miller compensation, nulling resistor, voltage buffer, and current buffer. The advantages and disadvantages of all these compensation strategies are evaluated based on a 180mm 1.8 V standard TSMC CMOS technology.
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