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1 
Ueber eine Gleichung 5. Grades der komplexen Multiplikation der elliptischen ModulfunktionenHeinis, Hugo, January 1911 (has links)
Thesis (doctoral)Universität Basel, 1911. / Vita. Includes bibliographical references.

2 
The elliptic modular functions associated with the elliptic norm curve E⁷Woods, Roscoe, January 1900 (has links)
Thesis (Ph. D.)University of Illinois, 1920. / Vita. "Reprinted from the Transactions of the American Mathematica Society, vol. 23, no. 2, March, 1922."

3 
Concerning certain elliptic modular functions of square rank ...Miller, John Anthony, January 1900 (has links)
Thesis (Ph. D.)University of Chicago. / Autobiography. "Reprinted from the American journal of mathematics, vol. 27, no. 1."

4 
Graduierte Ringe und ModulnSchiffels, Gerhard. January 1960 (has links)
Inaug.Diss.Bonn.

5 
Over modulaire vormen van meer veranderlijkenBruijn, N. G. de January 1943 (has links)
ProefschriftVrije Universiteit, Amsterdam. / "Literatuur": p. [63].

6 
Rapid hardware implementations of classical modular multiplicationJohnson, Scott Andrew 08 March 1995 (has links)
Modular multiplication is a mathematical operation fundamental to the RSA cryptosystern,
a publickey cryptosystem with many applications in privacy, security, and authenticity.
However, cryptosecurity requires that the numbers involved be extremely large,
typically ranging from 5121024 bits in length. Calculations on numbers of this magnitude
are cumbersome and lengthy; this limits the speed of RSA.
This thesis examines the problem of speeding up modular multiplication of large numbers
in hardware, using the classical (addandshift) multiplication algorithm. The problem is
broken down, and it is shown that the primary computational bottleneck occurs in the
modular reduction step performed on each cycle. This reduction consists of an integer
division step, a broadcast step, and a multiplication step.
Various methods of speeding up these steps are examined, both for the special case of
radix2 multipliers (those shifting a single bit at a time) and the general case of radix2r
multipliers (those shifting r bits on every cycle.) The impacts of these techniques, both on
cycle time and on chip area, are discussed. The scalability of these systems is examined,
and several implementations of modular multiplication found in the literature are analyzed.
Most significantly, the technique of pipelining of modular multipliers is examined. It is
shown that it is possible to pipeline the modular reduction sequence, effectively eliminating
the cycle time's dependence on either the size of the modulus, or on the size of the radius.
Furthermore, a technique for constructing such multipliers is given. It is demonstrated that
this technique is scalable with respect to time, and that pipelining eliminates many of the
disadvantages inherent in previous highradix implementations. It is also demonstrated that
such multipliers have an area requirement which is linear with respect to both radix and
modulus size. / Graduation date: 1995

7 
Extremal semimodular functions and combinatorial geometriesNguyen, Hien Quang January 1975 (has links)
Thesis. 1975. Ph.D.Massachusetts Institute of Technology. Dept. of Mathematics. / Vita. / Bibliography: leaves 132133. / by Nguyen Quang Hien. / Ph.D.

8 
ASIC design and implementation of a parallel exponentiation algorithm using optimized scalable Montgomery multipliersKurniawan, Budiyoso 14 March 2002 (has links)
Modular exponentiation and modular multiplication are the most used
operations in current cryptographic systems. Some wellknown cryptographic
algorithms, such as RSA, DiffieHellman key exchange, and DSA, require modular
exponentiation operations. This is performed with a series of modular multiplications
to the extent of its exponent in a certain fashion depending on the exponentiation
algorithm used.
Cryptographic functions are very likely to be applied in current applications
that perform information exchange to secure, verify, or authenticate data. Most notable
is the use of such applications in Internet based information exchange. Smart cards,
handhelds, cell phones and many other small devices also need to perform
information exchange and are likely to apply cryptographic functions.
A hardware solution to perform a cryptographic function is generally faster and
more secure than a software solution. Thus, a fast and area efficient modular
exponentiation hardware solution would provide a better infrastructure for current
cryptographic techniques.
In certain cryptographic algorithms, very large precisions are used. Further, the
precision may vary. Most of the hardware designs for modular multiplication and
modular exponentiation are fixedprecision solutions. A scalable Montgomery
Multiplier (MM) to perform modular multiplication has been proposed and can
operate on input values of any bitsize, but the maximum bitsize should be known and
is the limiting factor. The multiplier can calculate any operand size less than the
maximal precision. However, this design's parameters should be optimized depending
on the operand precision for which the design is used.
A software application was developed in C to find the optimized design for the
scalable MM module. It performs areatime tradeoff for the most commonly used
precisions in order to obtain a fast and area efficient solution for the common case.
A modular exponentiation system is developed using this scalable multiplier
design. Since the multiplier can operate on any operand size up to a certain maximum
value, the exponentiation system that utilizes the multiplier will inherit the same
capability.
This thesis work presents the design and implementation of an exponentiation
algorithm in hardware utilizing the optimized scalable Montgomery Multiplier. The
design uses a parallel exponentiation algorithm to reduce the total computation time.
The modular exponentiation system experimental results are analyzed and
compared with software and other hardware implementations. / Graduation date: 2002

9 
The design of a test environment and its use in verification of a scalable modular multiplication and exponentiation /Khair, Elias. January 1900 (has links)
Thesis (M.S.)Oregon State University, 2004. / Typescript (photocopy). Includes bibliographical references (leaves 5354). Also available on the World Wide Web.

10 
New hardware algorithms and designs for Montgomery modular inverse computation in Galois Fields GF(p) and GF(2 [superscript n])Gutub, Adnan AbdulAziz 11 June 2002 (has links)
Graduation date: 2003

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