This thesis looks at hardware algorithms that help reduce dynamic power dissipation in video encoder applications. Computational complexity of motion estimation and the data traffic between external memory and the video processing engine are two main reasons for large power dissipation in video encoders. While motion estimation may consume 50% to 70% of total video encoder power, the power dissipated in external memory such as the DDR SDRAM can be of the order of 40% of the total system power. Reducing power dissipation in video encoders is important in order to improve battery life of mobile devices such as the smart phones and digital camcorders. We propose hardware algorithms which extract only the important features in the video data to reduce the complexity of computations, communications and storage, thereby reducing average power dissipation. We apply this concept to design hardware algorithms for optimizing motion estimation matching complexity, and reference frame storage and access from the external memory. In addition, we also develop techniques to reduce searching complexity of motion estimation. First, we explore a set of adaptive algorithms that reduce average power dissipated due to motion estimation. We propose that by taking into account the macro-block level features in the video data, the average matching complexity of motion estimation in terms of number of computations in real-time hardwired video encoders can be significantly reduced when compared against traditional hardwired implementations, that are designed to handle most demanding data sets. Current macro-block features such as pixel variance and Hadamard transform coefficients are analyzed, and are used to adapt the matching complexity. The macro-block is partitioned based on these features to obtain sub-block sums, which are used for matching operations. Thus, simple macro-blocks, without many features can be matched with much less computations compared to the macro-blocks with complex features, leading to reduction in average power dissipation. Apart from optimizing the matching operation, optimizing the search operation is a powerful way to reduce motion estimation complexity. We propose novel search optimization techniques including (1) a center-biased search order and (2) skipping unlikely search positions, both applied in the context of real time hardware implementation. The proposed search optimization techniques take into account and are compatible with the reference data access pattern from the memory as required by the hardware algorithm. We demonstrate that the matching and searching optimization techniques together achieve nearly 65% reduction in power dissipation due to motion estimation, without any significant degradation in motion estimation quality. A key to low power dissipation in video encoders is minimizing the data traffic between the external memory devices such as DDR SDRAM and the video processor. External memory power can be as high as 50% of the total power budget in a multimedia system. Other than the power dissipation in external memory, the amount of data traffic is an important parameter that has significant impact on the system cost. Large memory traffic necessitates high speed external memories, high speed on-chip interconnect, and more parallel I/Os to increase the memory throughput. This leads to higher system cost. We explore a lossy, scalar quantization based reference frame compression technique that can be used to reduce the amount of reference data traffic from external memory devices significantly. In this scheme, the quantization is adapted based on the pixel range within each block being compressed. We show that the error introduced by the scalar quantization is bounded and can be represented by smaller number of bits compared to the original pixel. The proposed reference frame compression scheme uses this property to minimize the motion compensation related traffic, thereby improving the compression scheme efficiency. The scheme maintains a fixed compression ratio, and the size of the quantization error is also kept constant. This enables easy storage and retrieval of reference data. The impact of using lossy reference on the motion estimation quality is negligible. As a result of reduction in DDR traffic, the DDR power is reduced significantly. The power dissipation due to additional hardware required for reference frame compression is very small compared to the reduction in DDR power. 24% reduction in peak DDR bandwidth and 23% net reduction in average DDR power is achieved. For video sequences with larger motion, the amount of bandwidth reduction is even higher (close to 40%) and reduction in power is close to 30%.

[pt] As técnicas de estimação de movimento utilizadas nos padrões de compressão de vídeo proporcionam a utilização mais eficiente dos recursos de transmissão e armazenamento, através da redução do número de bits necessários para representar um sinal de vídeo e da conservação da qualidade do conteúdo que está sendo processado. O objetivo dessa dissertação de Mestrado é propor um novo algoritmo capaz de reduzir a grande complexidade computacional envolvida nestas técnicas, mantendo a qualidade do sinal reconstruído. Dessa maneira, apresenta-se um algoritmo AUMHS (Adaptive Unsymmetrical-cross Multi-Hexagon-grid Search) o qual traz como principais modificações ao algoritmo UMHS (Unsymmetrical-cross Multi-Hexagon-grid Search) a implementação de uma medida de movimento que classifica as cenas de uma seqüência de vídeo de acordo com o movimento detectado para posterior adequação dos parâmetros de estimação de movimento e de outros parâmetros do codificador. Como resultado apresenta-se um ganho expressivo na velocidade de processamento, e conseqüente redução do custo computacional, conservando-se a qualidade obtida pelos principais algoritmos da literatura. O algoritmo foi implementado no codificador do padrão H.264/AVC onde realizou-se análises comparativas de desempenho com os algoritmos UMHS e FSA através da medição de parâmetros como PSNR (Peak Signal to Noise Ratio), tempo de processamento do codificador, tempo de processamento do módulo de estimação de movimento, taxa de bits utilizada e avaliação subjetiva informal. / [en] The motion estimation techniques used by the video compression standards provide an efficient utilization of the transmission and storage resources, through the reduction of the number of bits required to represent a video signal and the conservation of the content quality that is being processed. The objective of this work is to propose a new algorithm capable of reducing the great computational complexity involved in the motion estimation techniques, keeping the quality of the reconstructed signal. In this way, we present an algorithm called AUMHS (Adaptive Unsymmetrical-cross Multi-Hexagon-grid Search) which brings as main modifications relative to the UMHS (Unsymmetrical-cross Multi-Hexagon-grid Search) the implementation of a movement measure that can classify the scenes of a video sequence according to the motion detected for posterior adequacy of the motion estimation and others coder parameters. As result we present an expressive gain in the processing speed, and consequent computational cost reduction, conserving the same quality of the main algorithms published in the literature. The algorithm was implemented in the H.264/AVC coder in order to proceed with comparative analysis of perfomance together with the UMHS and FSA algorithms, measuring parameters as PSNR (Peak Signal you the Noise Ratio), coding processing time, motion estimation time, bit rate, and informal subjective evaluation.