Indiana University-Purdue University Indianapolis (IUPUI) / In this work, we investigate the trade-off between scalability and reliability for next generation logic-transistors i.e. Gate-All-Around (GAA)-FET, Multi-Bridge-Channel (MBC)-FET. First, we analyze the electronic properties (i.e. bandgap and quantum conductance) of ultra-thin silicon (Si) channel i.e. nano-wire and nano-sheet based on first principle simulation. In addition, we study the influence of interface states (or dangling bonds) at Si-SiO2 interface. Second, we investigate the impact of bandgap change and interface states on GAA-FETs and MBC-FETs characteristics by employing Non-equilibrium Green's Function based device simulation. In addition to that we calculate the activation energy of Si-H bond dissociation at Si-SiO2 interface for different Si nano-wire/sheet thickness and different oxide electric- field. Utilizing these thickness dependent activation energies for corresponding oxide electric- field, in conjunction with reaction-diffusion model, we compute the characteristics shift and analyze the negative bias temperature instability in GAA-FET and MBC-FET. Based on our analysis, we estimate the operational voltage of these transistors for a life-time of 10 years and the ON current of the device at iso-OFF-current condition. For example, for channel length of 5 nm and thickness < 5 nm the safe operating voltage needs to be < 0.55V. Furthermore, our analysis suggests that the benefi t of Si thickness scaling can potentially be suppressed for obtaining a desired life-time of GAA-FET and MBC-FET.

Modified graphene and low dimensional carbon nano-electronic devices have the potential to supersede current technologies in many respects although manufacturing and understanding these materials poses a significant challenge which requires an incremental approach. Doping of graphene, a prerequisite for modifying the electronic properties, is still poorly understood.Band-modulation is therefore difficult to control. Resonant tunneling induced through the incorporation of impurity clusters has not yet been addressed. On the other hand electronspin correlations in modified graphenes have hardly been studied. In this work we address these issues through a tandem approach of theoretical and experimental studies. This work begins with an ab-initio study of the electronic properties of bilayer graphene and the modifications induced through the substitutional incorporation of isolated nitrogen impurities.Nitrogen modification results in a change from a zero-gap semiconductor to a metal as a result of nitrogen incorporation while charge density calculations show the localization of charge in the vicinity of the impurity. This work on isolated impurities was then extended to impurity clusters. The quantum transport properties of impurity clusters distributed within a high bandgap material were then studied. Different geometrical configurations of the impurity clusters were studied to tune quantum interference to control the carrier lifetime. The effects of randomly distributed clusters were also studied to interpret the effects of disorder. These studies provide insight into the transport properties of naturally grown quantum dot systems such as reduced graphene oxide which consists of low defect density graphene nano-islands randomly distributed in oxygen and free radical functionalized graphene which was studied experimentally. Resistance was recorded as a function of temperature for graphene oxide and reduced graphene oxide two terminal devices. Evidence of mesoscopic resistance fluctuations, charge carrier activation and enhanced elastic scattering was found while the magnetic properties of reduced graphene oxide showed a phase transition from ferromagnetism at low temperatures to diamagnetism at higher temperatures. Finally, the Kondo effect was demonstrated in reduced graphene oxide through transport and magnetoresistance measurements which were interpreted within the Fermi liquid description of the Kondo effect. These effects were explained through the microstructure of reduced graphene oxide and illustrate the significance of spin in reduced graphene oxide. These studies will inform the design of functionalized graphene spin-polarized devices and spin valves.

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Thesis (M.Sc.)--York University, 2007. Graduate Progamme in Chemistry. / Typescript. Includes bibliographical references. Also available on the Internet. MODE OF ACCESS via web browser by entering the following URL: http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&res_dat=xri:pqdiss&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&rft_dat=xri:pqdiss:MR38764

Continual technology innovations make it possible to fabricate electronic devices on the order of 10nm. In this nanoscale regime, quantum physics becomes critically important, like energy quantization effects of the narrow channel and the leakage currents due to tunneling. It has also been utilized to build novel devices, such as the band-to-band tunneling field-effect transistors (FETs). Therefore, it presages accurate quantum transport simulations, which not only allow quantitative understanding of the device performances but also provide physical insight and guidelines for device optimizations. However, quantum transport simulations usually require solving repeatedly the Green’s function or the wave function of the whole device region with open boundary treatment, which are computationally cumbersome. Moreover, to overcome the short-channel effects, modern devices usually employ multi-gate structures that are three-dimensional, making the computation very challenging. It is the major target of this thesis to enhance the simulation efficiency by proposing several fast numerical algorithms. The other target is to apply these algorithms to study the physics and performances of some emerging electronic devices. First, an efficient method is implemented for real space simulations with the effective mass approximation. Based on the wave function approach, asymptotic waveform evaluation combined with a complex frequency hopping algorithm is successfully adopted to characterize electron conduction over a wide energy range. Good accuracy and efficiency are demonstrated by simulating several n-type multi-gate silicon FETs. This technique is valid for arbitrary potential distribution and device geometry, making it a powerful tool for studying n-type silicon nanowire (SiNW) FETs in the presence of charged impurity and surface roughness scattering. Second, a model order reduction (MOR) method is proposed for multiband simulation of nanowire structures. Employing three- or six-band k.p Hamiltonian, the non-equilibrium Green’s function (NEGF) equations are projected into a much smaller subspace constructed by sampling the Bloch modes of each cross-section layer. Together with special sampling schemes and Krylov subspace methods for solving the eigenmodes, large cross-section p-type SiNW FETs can be simulated. A novel device, junctionless FET, is then investigated. It is found that its doping density, channel orientation, and channel size need to be carefully optimized in order to outperform the classical inversion-mode FET. With a spurious band elimination process, the MOR method is subsequently extended to the eight-band k.p model, allowing simulation of band-to-band tunneling devices. In particular, tunneling FETs with indium arsenide (InAs) nanowire channel are studied, considering different channel orientations and configurations with source pockets. Results suggest that source pocket has no significant impact on the performances of the nanowire device due to its good electrostatic integrity. At last, improvements are made for open boundary treatment in atomistic simulations. The trick is to condense the Hamiltonian matrix of the periodic leads before calculating the surface Green’s function. It is very useful for treating leads with long unit cells. / published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

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Thesis (Ph. D.)--Brigham Young University. Dept. of Chemistry and Biochemistry, 2006. / Includes bibliographical references.

Thesis (Ph.D.)--Virginia Commonwealth University, 2008. / Prepared for: Dept. of Electrical Engineering. Title from thesis description page. Includes bibliographical references.

Thesis (M. Sc.)--University of Alberta, 2009. / Title from pdf file main screen (viewed on Sept 22, 2009). "A thesis submitted to the Faculty of Graduate Studies and Research in partial fulfillment of the requirements for the degree of Master of Science, Department of Electrical and Computer Engineering, University of Alberta." Includes bibliographical references.