by Cheuk-Him, To. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1998. / Includes bibliographical references. / Abstract also in Chinese. / ACKNOWLEDGMENT --- p.I / ABSTRACT (ENGLISH) --- p.II / ABSTRACT (CHINESE) --- p.III / CONTENTS --- p.IV / TABLE OF FIGURES --- p.VI / Chapter CHAPTER 1 --- INTRODUCTION --- p.1-1 / Chapter 1.1 --- Introduction --- p.1-1 / Chapter 1.2 --- Different types of DCO --- p.1-2 / Chapter 1.2.1 --- Divided by N counter --- p.1-2 / Chapter 1.2.2 --- Increment-decrement counter --- p.1-2 / Chapter 1.2.3 --- Controlled delay ring oscillator --- p.1-4 / Chapter 1.3 --- Problems suffered from these circuits --- p.1-4 / Chapter 1.4 --- Characteristics of the proposed circuit --- p.1-5 / Chapter CHAPTER 2 --- BACKGROUND THEORY --- p.2-1 / Chapter 2.1 --- Ring Oscillator --- p.2-1 / Chapter 2.2 --- Differential Pair --- p.2-1 / Chapter 2.3 --- Injection Locked Oscillator (ILO) --- p.2-2 / Chapter 2.4 --- Digital Controlled Oscillator --- p.2-3 / Chapter CHAPTER 3 --- DESIGN --- p.3-1 / Chapter 3.1 --- Circuit Description --- p.3-1 / Chapter 3.1.1 --- D/A converter --- p.3-2 / Chapter 3.1.2 --- Injection Locked Oscillator (ILO) --- p.3-3 / Chapter 3.2 --- Design Characteristics --- p.3-5 / Chapter 3.2.1 --- D/A converter --- p.3-5 / Chapter 3.2.2 --- ILO --- p.3-7 / Chapter 3.2.3 --- Physical Design (Layout Drawing) --- p.3-8 / Chapter CHAPTER 4 --- RESULTS --- p.4-1 / Chapter 4.1 --- Chip1 --- p.4-1 / Chapter 4.1.1 --- Simulation --- p.4-3 / Chapter 4.1.2 --- Measurement --- p.4-15 / Chapter 4.1.3 --- Evaluation --- p.4-23 / Chapter 4.2 --- Chip2 --- p.4-25 / Chapter 4.2.1 --- Simulation --- p.4-25 / Chapter 4.2.2 --- Measurement --- p.4-36 / Chapter 4.2.3 --- Evaluation --- p.4-47 / Chapter CHAPTER 5 --- CONCLUSION --- p.5-1 / REFERENCES: --- p.1 / APPENDIX: --- p.1

Leung Lai-Kan. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2001. / Includes bibliographical references (leaves 131-154). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgement --- p.iii / Table of Contents --- p.iv / List of Figures --- p.ix / List of Tables --- p.xv / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Overview --- p.1 / Chapter 1.2 --- Objectives --- p.2 / Chapter 1.3 --- Thesis Organization --- p.4 / Chapter Chapter 2 --- Fundamentals of Voltage Controlled Oscillators --- p.6 / Chapter 2.1 --- Definition of Commonly Used Figures of Merit --- p.6 / Chapter 2.1.1 --- Cutoff frequency --- p.6 / Chapter 2.1.2 --- Center Frequency --- p.8 / Chapter 2.1.3 --- Tuning Range --- p.8 / Chapter 2.1.4 --- Tuning Sensitivity --- p.8 / Chapter 2.1.5 --- Output Power --- p.8 / Chapter 2.1.6 --- Power Consumption --- p.9 / Chapter 2.1.7 --- Supply Pulling --- p.9 / Chapter 2.2 --- Phase Noise --- p.9 / Chapter 2.2.1 --- Definition of Phase Noise --- p.9 / Chapter 2.2.2 --- Phase Noise Specification --- p.11 / Chapter 2.2.3 --- Leeson's formula --- p.12 / Chapter 2.2.4 --- Models developed by J. Cranincks and M. Steyaert10 --- p.13 / Chapter 2.2.5 --- Linear Time-Variant Phase Noise Model --- p.13 / Chapter 2.3 --- Building Blocks of Voltage Controlled Oscillators --- p.17 / Chapter 2.3.1 --- FETs --- p.17 / Chapter 2.3.2 --- Varactor --- p.18 / Chapter 2.3.3 --- Spiral Inductor --- p.21 / Chapter 2.3.4 --- Modeling of the Spiral Inductor --- p.24 / Chapter 2.3.5 --- Analysis and Simulation --- p.26 / Chapter Chapter 3 --- Digital Controlled Oscillator --- p.28 / Chapter 3.1 --- Introduction --- p.28 / Chapter 3.2 --- General Principle of Oscillation --- p.28 / Chapter 3.3 --- Different Oscillator Architectures --- p.30 / Chapter 3.3.1 --- Single-ended Ring Oscillator --- p.30 / Chapter 3.3.2 --- Differential Ring Oscillator --- p.32 / Chapter 3.3.3 --- CMOS Injection-locked Oscillator --- p.33 / Chapter 3.4 --- Basic Principle of the Injection-locked Oscillator --- p.34 / Chapter 3.5 --- Digital Controlled Oscillator --- p.36 / Chapter 3.5.1 --- R-2R Digital-to-Analog Converter --- p.37 / Chapter 3.6 --- Injection Locking --- p.42 / Chapter 3.6.1 --- Synchronization Model of the Injection Locked Oscillator --- p.42 / Chapter 3.7 --- Simulation Results --- p.44 / Chapter 3.7.1 --- Frequency Tuning Characteristics --- p.44 / Chapter 3.7.2 --- Phase Noise Performance --- p.47 / Chapter 3.7.3 --- Locking Characteristics --- p.48 / Chapter 3.7.4 --- Sensitivity to Supply Voltage and Temperature --- p.48 / Chapter 3.8 --- Conclusion --- p.49 / Chapter Chapter 4 --- CMOS LC Voltage Controlled Oscillator --- p.51 / Chapter 4.1 --- Introduction --- p.51 / Chapter 4.2 --- LC Oscillator --- p.52 / Chapter 4.3 --- Circuit Design --- p.54 / Chapter 4.3.1 --- Oscillation Frequency --- p.55 / Chapter 4.3.2 --- Oscillation Amplitude --- p.58 / Chapter 4.3.3 --- Transistor Sizing --- p.59 / Chapter 4.3.4 --- Power Consumption --- p.62 / Chapter 4.3.5 --- Tuning Range --- p.62 / Chapter 4.3.6 --- Phase Noise Analysis --- p.63 / Chapter 4.4 --- Conclusion --- p.70 / Chapter Chapter 5 --- LC Quadrature Voltage Controlled Oscillator --- p.71 / Chapter 5.1 --- Introduction --- p.71 / Chapter 5.2 --- Conventional CMOS Quadrature LC Voltage Controlled Oscillator --- p.73 / Chapter 5.3 --- Operational Principle of the CMOS Quadrature LC Voltage Controlled Oscillator --- p.74 / Chapter 5.3.1 --- General Explanation --- p.74 / Chapter 5.3.2 --- Mathematical Analysis --- p.75 / Chapter 5.3.3 --- Drawback of the Conventional CMOS LC Quadrature VCO --- p.77 / Chapter 5.4 --- Novel CMOS Low Noise Quadrature Voltage Controlled Oscillator --- p.78 / Chapter 5.4.1 --- Equivalent Output Noise due to the Coupling Transistor --- p.80 / Chapter 5.4.2 --- Linear Time Varying Model for the Analysis of Total Phase Noise --- p.83 / Chapter 5.4.3 --- Tuning Range --- p.94 / Chapter 5.4.4 --- Start-up Condition --- p.95 / Chapter 5.4.5 --- Power Consumption --- p.97 / Chapter 5.5 --- New Tuning Mechanism of the Proposed LC Quadrature VCO --- p.98 / Chapter 5.6 --- Modified Version of the Proposed LC Quadrature Voltage Controlled Oscillator --- p.105 / Chapter 5.7 --- Conclusion --- p.108 / Chapter Chapter 6 --- Layout Consideration --- p.109 / Chapter 6.1 --- Substrate Contacts --- p.109 / Chapter 6.2 --- Guard Rings --- p.110 / Chapter 6.3 --- Thermal Noise of the Gate Interconnect --- p.111 / Chapter 6.4 --- Use of Different Layers of Metal for Interconnection --- p.112 / Chapter 6.5 --- Slicing of Transistors --- p.113 / Chapter 6.6 --- Width of Interconnecting Wires and Numbers of Vias --- p.114 / Chapter 6.7 --- Matching of Devices --- p.114 / Chapter 6.8 --- Die Micrographs of the Prototypes of the Oscillators --- p.115 / Chapter Chapter 7 --- Experimental Results --- p.118 / Chapter 7.1 --- Methodology --- p.118 / Chapter 7.2 --- Evaluation Board --- p.119 / Chapter 7.3 --- Measurement Setup --- p.123 / Chapter 7.4 --- Experimental Results --- p.125 / Chapter 7.4.1 --- CMOS Injection Locked Oscillator --- p.125 / Chapter 7.4.2 --- LC Differential Voltage Controlled Oscillator --- p.128 / Chapter 7.4.3 --- LC Quadrature Voltage Controlled Oscillator --- p.132 / Chapter 7.5 --- Summary of Performance --- p.139 / Chapter Chapter 8 --- Conclusion --- p.142 / Chapter 8.1 --- Contribution --- p.142 / Chapter 8.2 --- Further Development --- p.143 / Chapter Chapter 9 --- Appendix --- p.145 / Chapter 9.1 --- Circuit Transformation --- p.145 / Chapter 9.2 --- Derivation of the Inductor Model with PGS --- p.146 / Chapter 9.2.1 --- "Inductance," --- p.146 / Chapter 9.2.2 --- "Series Resistance, Rs" --- p.146 / Chapter 9.2.3 --- Series Capacitance --- p.147 / Chapter 9.2.4 --- Shunt Oxide Capacitance --- p.147 / Chapter 9.3 --- Calculation of Phase Noise Using the Linear Time Variant Model --- p.148 / Chapter Chapter 10 --- Bibliography --- p.151

The design of two 2.4GHz CMOS LC balanced oscillators in the 0.25μm National BiCMOS process for Bluetooth specifications is presented. These oscillators achieve low phase noise with low power consumption. At a frequency offset of 500KHz from the 2.11GHz carrier, the measured phase noise is -101.9dBc/Hz for the NMOS oscillator with a power dissipation of 12.5mW. The complementary oscillator has a phase noise of -103.6dBc/Hz at 500KHz offset from the 2.19GHz carrier and a power dissipation of 6.25mW from a 2.5V power supply. A wide tuning range of 16% is obtained by means of a PMOS varactor in conjunction with an array of switched capacitors. / Graduation date: 2002

Cheng Sin-hang. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2002. / Includes bibliographical references (leaves 90-92). / Abstracts in English and Chinese. / Chapter Chapter 1 --- Introduction --- p.1 / Chapter Chapter 2 --- Theory of Oscillator Design --- p.4 / Chapter 2.1 --- Open-loop approach --- p.4 / Chapter 2.2 --- One-port approach --- p.6 / Chapter 2.3 --- Two-port approach --- p.9 / Chapter 2.4 --- Voltage controlled oscillator (VCO) design --- p.10 / Chapter 2.4.1 --- Active device selection and biasing --- p.11 / Chapter 2.4.2 --- Feedback circuit design --- p.15 / Chapter 2.4.3 --- Frequency tuning circuit --- p.20 / Chapter Chapter 3 --- Noise in Oscillators --- p.23 / Chapter 3.1 --- Origin of phase noise --- p.23 / Chapter 3.2 --- Impact of phase noise in communication system --- p.28 / Chapter 3.3 --- Phase noise consideration in VCO design --- p.30 / Chapter Chapter 4 --- Low Temperature Co-Fired Ceramic --- p.31 / Chapter 4.1 --- LTCC process --- p.31 / Chapter 4.1.1 --- LTCC fabrication process --- p.32 / Chapter 4.1.2 --- LTCC materials --- p.34 / Chapter 4.1.3 --- Advantages of LTCC technology --- p.35 / Chapter 4.2 --- Passive components realization in LTCC --- p.37 / Chapter 4.2.1 --- Capacitor --- p.37 / Chapter 4.2.2 --- Inductor --- p.42 / Chapter Chapter 5 --- High-Q LTCC Resonator Design --- p.47 / Chapter 5.1 --- Definition of Q-factor --- p.47 / Chapter 5.2 --- Stripline --- p.50 / Chapter 5.3 --- Power losses --- p.52 / Chapter 5.4 --- Laminated stripline resonator design --- p.53 / Chapter 5.4.1 --- λ/4 resonator structure --- p.57 / Chapter 5.4.2 --- Meander-line resonator structure --- p.60 / Chapter 5.4.3 --- Bi-metal-layer resonator structure --- p.63 / Chapter Chapter 6 --- LTCC Voltage Controlled Oscillator Design --- p.67 / Chapter 6.1 --- Circuit design --- p.67 / Chapter 6.2 --- Output filter --- p.68 / Chapter 6.3 --- Embedded capacitor --- p.71 / Chapter 6.4 --- VCO layout and simulation --- p.72 / Chapter Chapter 7 --- Experimental Setup and Results --- p.77 / Chapter 7.1 --- Measured Result: LTCC resonators --- p.77 / Chapter 7.1.1 --- Experimental results --- p.79 / Chapter 7.2 --- Measured results: LTCC voltage controlled oscillators --- p.83 / Chapter Chapter 8 --- Conclusion and Future Work --- p.88 / Reference List --- p.90 / Appendix A: TRL calibration method --- p.93 / Appendix B: Q measurement --- p.103 / Appendix C: Q-factor extraction program listing --- p.109 / Chapter 1. --- Function used to calculate Q from s-parameter --- p.109 / Chapter 2. --- Function used to calculate Q from z-parameter --- p.111

Yip Kim-fung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2002. / Includes bibliographical references (leaves 95-100). / Abstracts in English and Chinese. / Abstract --- p.I / Acknowledgement --- p.III / Table of Contents --- p.IV / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivation --- p.1 / Chapter 1.2 --- Objective --- p.6 / Chapter Chapter 2 --- Theory of Oscillators --- p.7 / Chapter 2.1 --- Oscillator Design --- p.7 / Chapter 2.1.1 --- Loop-Gain Method --- p.7 / Chapter 2.1.2 --- Negative Resistance-Conductance Method --- p.8 / Chapter 2.1.3 --- Crossed-Coupled Oscillator --- p.10 / Chapter Chapter 3 --- Noise Analysis --- p.15 / Chapter 3.1 --- Origin of Noise Sources --- p.16 / Chapter 3.1.1 --- Flicker Noise --- p.16 / Chapter 3.1.2 --- Thermal Noise --- p.17 / Chapter 3.1.3 --- Noise Model of Varactor --- p.18 / Chapter 3.1.4 --- Noise Model of Spiral Inductor --- p.19 / Chapter 3.2 --- Derivation of Resonator --- p.19 / Chapter 3.3 --- Phase Noise Model --- p.22 / Chapter 3.3.1 --- Leeson's Model --- p.23 / Chapter 3.3.2 --- Phase Noise Model defined by J. Cranincks and M Steyaert --- p.24 / Chapter 3.3.3 --- Non-linear Analysis of Phase Noise --- p.26 / Chapter 3.3.4 --- Flicker-Noise Upconversion Mechanism --- p.31 / Chapter 3.4 --- Phase Noise Reduction Techniques --- p.33 / Chapter 3.4.1 --- Conventional Tank Circuit Structure --- p.33 / Chapter 3.4.2 --- Enhanced Q tank circuit Structure --- p.35 / Chapter 3.4.3 --- Tank Circuit with parasitics --- p.37 / Chapter 3.4.4 --- Reduction of Up-converted Noise --- p.39 / Chapter Chapter 4 --- CMOS Technology and Device Modeling --- p.42 / Chapter 4.1 --- Device Modeling --- p.42 / Chapter 4.1.1 --- FET model --- p.42 / Chapter 4.1.2 --- Layout of Interdigitated FET --- p.46 / Chapter 4.1.3 --- Planar Inductor --- p.48 / Chapter 4.1.4 --- Circuit Model of Planar Inductor --- p.50 / Chapter 4.1.5 --- Inductor Layout Consideration --- p.54 / Chapter 4.1.6 --- CMOS RF Varactor --- p.55 / Chapter 4.1.7 --- Parasitics of PMOS-type varactor --- p.57 / Chapter Chapter 5 --- Design of Integrated CMOS VCOs --- p.59 / Chapter 5.1 --- 1.5GHz CMOS VCO Design --- p.59 / Chapter 5.1.1 --- Equivalent circuit model of differential LC VCO --- p.59 / Chapter 5.1.2 --- Reference Oscillator Circuit --- p.61 / Chapter 5.1.3 --- Proposed Oscillator Circuit --- p.62 / Chapter 5.1.4 --- Output buffer --- p.63 / Chapter 5.1.5 --- Biasing Circuitry --- p.64 / Chapter 5.2 --- Spiral Inductor Design --- p.65 / Chapter 5.3 --- Determination of W/L ratio of FET --- p.67 / Chapter 5.4 --- Varactor Design --- p.68 / Chapter 5.5 --- Layout (Cadence) --- p.69 / Chapter 5.6 --- Circuit Simulation (SpectreRF) --- p.74 / Chapter Chapter 6 --- Experimental Results and Discussion --- p.76 / Chapter 6.1 --- Measurement Setup --- p.76 / Chapter 6.2 --- Measurement results: Reference Oscillator Circuit --- p.81 / Chapter 6.2.1 --- Output Spectrum --- p.81 / Chapter 6.2.2 --- Phase Noise Performance --- p.82 / Chapter 6.2.3 --- Tuning Characteristic --- p.83 / Chapter 6.2.4 --- Microphotograph --- p.84 / Chapter 6.3 --- Measurement results: Proposed Oscillator Circuit --- p.85 / Chapter 6.3.1 --- Output Spectrum --- p.85 / Chapter 6.3.2 --- Phase Noise Performance --- p.86 / Chapter 6.3.3 --- Tuning Characteristic --- p.87 / Chapter 6.3.4 --- Microphotograph --- p.88 / Chapter 6.4 --- Comparison of Measured Results --- p.89 / Chapter 6.4.1 --- Phase Noise Performance --- p.89 / Chapter 6.4.2 --- Tuning Characteristic --- p.90 / Chapter Chapter 7 --- Conclusion and Future Work --- p.93 / Chapter 7.1 --- Conclusion --- p.93 / Chapter 7.2 --- Future Work --- p.94 / References --- p.95 / Author's Publication --- p.100 / Appendix A --- p.101 / Appendix B --- p.104 / Appendix C --- p.106

Silicon alternatives to quartz crystal based oscillators to electronic system clocking are explored. A study of clocking requirements reveals widely different specifications for different applications. Traditional CMOS oscillator-based solutions are optimized for low-cost fully integrated micro-controller clock applications. The frequency variability of these clock generators is studied and techniques to compensate for this variability are proposed. The efficacy of these techniques in reducing variability is proven theoretically and experimentally. MEMS-resonator based oscillators, due to their exceptional quality factors, are identified as suitable integrated replacements to quartz based oscillators for higher accuracy applications such as data converter clocks. The frequency variation in these oscillators is identified and techniques to minimize the same are proposed and demonstrated. The sources of short-term variation (phase noise) in these oscillators are discussed and an inclusive theory of phase noise is developed. Techniques to improve phase noise are proposed. Findings from this research indicate that MEMS resonator based oscillators, may in future, outperform quartz based solutions in certain applications such as voltage controlled oscillators. The implications of these findings and potential directions for future research are identified.

Wireless communication is witnessing tremendous growth with the proliferation of various standards covering wide, local, and personal area networks, which operate at different frequency bands. Future wireless terminals will not only need to support multiple standards, but also need to be multi-functional to keep pace with the demands of the consumers. For such an implementation, the local oscillator (LO) turns out to be the bottleneck, which must exhibit frequency agility by generating a very wide range of carrier frequencies in order to access all the specified communication standards. This dissertation presents various design techniques to realize compact low-cost low-power and broadband oscillators in silicon-based technologies. The two most suitable techniques for broadband signal generation: (1) Use of widely tunable active inductor, and (2) Use of switched resonator have been thoroughly evaluated. A fully reconfigurable active inductor with a widely tunable feedback resistor has been proposed. Using the proposed tunable active inductor in a VCO generates frequency tuning ranges higher than 100%, and helps achieve the highest PFTN Figure-of-Merit among Si-based active inductor VCOs reported in literature till date. The large-signal non-linearity of the active inductor has been utilized to develop the first reported broadband harmonic active inductor-based VCO. The degradation of phase noise due to active inductors is partially solved by a noise optimization guideline for active inductors. Utilizing the low saturation voltage of HBT technologies and high-Q short line inductors seems to be very useful to reduce power consumption of cross-coupled VCOs while achieving low phase noise performance simultaneously.