The goal of the thesis is to design the star-based mesh topology by introducing multiple pan-coordinators (hub/switches) under a multipath-fading environment and to improve the data transaction rate of a network which usually gets worst when there is a single pan-coordinator for synchronization of devices in conventional mesh topology; also reduce the hop-count as least as possible. Most of the work has been done on NS-2 network simulator; therefore the research model which has been used here is a simulation model. Altogether 3 simulations have been done. The first scenario is done on a simplest mesh network with a single coordinator and a radio propagation model which has been used is two-ray ground reflection model. The second scenario simulation is similar to the first scenario but in-order to provide multi-path signal fading and highly congested environment the propagation model which has been used this time is shadowing model. The final simulation which has been done is of multiple-star based mesh topology it also uses the similar radio propagation model which has been defined for second scenario. An intensive performance measurement of all the three simulations has been done in terms of transactions made per-second, packet drop rate along with an analysis of packet drop. An hop-count is also measured between star and mesh topology. For multiple star based mesh topology it can be assumed if multiple stars with a routing capability can be used then nodes in a network will be synchronized or re-synchronized with least number of hops in the congested network with a near-by pan-coordinator (hub/switch). One of the major applications of this topology can be automobile manufacturing industry where alot of machines are installed in a congested network and monitoring of every area is mandatory for swift production.

The objective of this thesis is to get familiar with wireless sensor networks technologies and with standard IEEE 802.15.4. and communication principle in wireless sensor networks built on this standard. Main goal of this project is to design a packet analyzer, which is capable to catch data on chosen channel and this data is able to analyze. Part of this project is production of necessary microcontroller software equipment. Another output of this project is do a research of available packet analyzers on market and compare them with analyzer build by this thesis.