No description available.

No description available.

No description available.

No description available.

No description available.

No description available.

Power MOSFETs are often required to operate in a space radiation environment; therefore, they are susceptible to a catastrophic failure mode called single-event burnout. Single-event burnout of power MOSFETs is initiated by the passage of an energetic-heavy ion through the parasitic BJT inherent to the power-MOSFET structure. The electron-hole pairs generated by the ion support a short-lived current source which imposes a base-emitter voltage on the parasitic BJT. If a sufficient base-emitter voltage is imposed, the parasitic BJT enters second breakdown and burnout of the MOSFET occurs. A semi-analytical model has been developed to predict the energy required of the incident ion to initiate burnout. This thesis addresses the portion of this model which relates the energy of the incident ion to the base-emitter voltage imposed on the parasitic BJT. The initial base-emitter potential is determined using image-source techniques.

Electrical trim techniques for reducing the value of a trimmable single crystal silicon resistor (trimistor) are presented. Computer-controlled current pulses are used to incrementally decrease the value of the trimistor through metal/silicon alloying. Variations of both single and multipulse current pulses are investigated. Physical mechanisms, based on electron microscopy of trimistors trimmed under various conditions, are hypothesized to explain the observed trim behavior. Threshold currents are dependent on the initial value of the resistor, the applied current density and the trim method. The electrical trim technique for a single trimmable resistor element is optimized. The final resistance values of the trimmed trimistors are shown to be stable provided that a current at or above the threshold current is not applied thereafter. The performance of both N+ and P trim resistors is evaluated over temperature and accelerated operating life.

Optimization of dichromated gelatin (DCG) film coatings for holographic recording is presented. The Taguchi optimization method is applied to DCG film coatings to obtain high uniformity. Two-level factorial design is used to optimize the emulsion curing conditions for high diffraction efficiency. Film thicknesses ranging from 6.0 to 23.4 mum are obtained with uniformities between 4.0 and 8.0%. Peak diffraction efficiencies between 87.0 and 96.9% are obtained using the optimized curing conditions. A possible holographic formation mechanism is introduced and experimental results for shrinkage and swelling are summarized. Both reflection type substrate mode holograms and polarization selective transmission type holograms are fabricated using optimized films. An improved Brewster angle method is also used to obtain an accurate measurement of the refractive index of DCG films, which are important in the design of holographic optical elements.

Metal contamination levels are a growing concern in integrated circuit manufacturing because they degrade electrical performance. This work uses statistical design of experiments to determine deposition characteristics of transition and heavy metal contaminants onto silicon surfaces from process chemicals that are used in wafer cleaning. Copper, gold, molybdenum, silver, lead, chromium, tin, titanium, manganese, and tungsten were added to buffered oxide etchant (BOE or BHF) and hydrofluoric acid (HF) solutions. Wafers were immersed in these solutions and evaluated by total reflection x-ray fluoresence (TXRF) surface analysis. For those metals that are found to deposit from solution, statistical analysis is utilized to develop empirical models which describe the deposition characteristics.