Orientador: Carlos Alberto Canesin / Banca: Fabio Toshiaki Wakabayashi / Banca: Luiz Carlos de Freitas / Resumo: Este trabalho apresenta o desenvolvimento e implementação de um emulador para a característica estática de saída (Tensão versus Corrente) equivalente àquela de fontes de energia com células combustível. O emulador apresenta como vantagens, em relação à aquisição de uma FC, o baixo custo, o reduzido espaço físico e a flexibilidade via software para a implementação de diversas características baseadas em diferentes tipos de células combustível. Neste sentido, o emulador proposto permite a realização de ensaios preliminares durante a fase de projeto e os testes dinâmicos dos subsistemas de condicionamento de energia, sem a necessidade do acoplamento com o sistema de geração à células combustível, reduzindo-se os custos associados a estes testes laboratoriais. O emulador proposto consiste em um conversor Buck isolado "Full-Bridge", com potência de saída de 2kW e alimentação via barramento de 400VCC, permitindo a emulação da característica nominal de saída de um conjunto de células tipo PEM ("Proton Exchange Membrane" - Membrana de Troca Protônica), em uma faixa de tensão de saída variando entre 32VCC e 72VCC, dependendo da corrente drenada pela carga. O circuito principal de controle é realizado através... (Resumo completo, clicar acesso eletrônico abaixo) / Abstract: This work presents a design and implementation of an emulator to the static output characteristic (Voltage versus Current) that is similar to Fuel Cell generators. There are many advantages on using the Fuel Cell emulator. The emulator is cheaper, smaller and more flexible than the real Fuel Cell systems, because it is possible to emulate different characteristics through the use of a computer. In this context, a Fuel Cell emulator is proposed in this work in order to allow laboratory testes in the power conditioning system during its design and development stage. The proposed emulator is an insulated "Full-Bridge" converter with "Buck" operation, 2kW output power and 400VCC input voltage. This emulator achieves the output characteristic of a PEM (Proton Exchange Membrane) Fuel Cell stack with output voltage range of 32VCC to 72VCC, depending on the output current. The main control circuit is based on FPGA (Field Programmable Gate Array) and VHDL (Very High Speed Integrated Circuit Hardware Description Language) language. The experimental results demonstrate that the proposed emulator achieves the output static characteristic of the PEMFC Fuel Cell System and this output characteristic can be easily modified in order to obtain another desirable static... (Complete abstract click electronic access below) / Mestre

The underlying physical mechanisms of destructive single event effects (SEE) from heavy ion radiation have been widely studied in traditional vertical double-diffused power MOSFETs (VDMOS). Recently lateral double-diffused power MOSFETs (LDMOS), which inherently provide lower gate charge than VDMOS, have become an attractive option for MHz-frequency DC-DC converters in terrestrial power electronics applications [1]. There are growing interests in extending the LDMOS concept into radiation-hard space applications. Since the LDMOS has a device structure considerably different from VDMOS, the well studied single event burn-out (SEB) or single event gate rapture (SEGR) response of VDMOS cannot be simply assumed for LDMOS devices without further investigation. A few recent studies have begun to investigate ionizing radiation effects in LDMOS devices, however, these studies were mainly focused on displacement damage and total ionizing dose (TID) effects, with very limited data reported on the heavy ion SEE response of these devices [2]-[5]. Furthermore, the breakdown voltage of the LDMOS devices in these studies was limited to less than 80 volts (mostly in the range of 20-30 volts), considerably below the voltage requirement for some space power applications. In this work, we numerically and experimentally investigate the physical insights of SEE in two different fabricated LDMOS devices designed by the author and intended for use in radiation hard applications. The first device is a 24 V Resurf LDMOS fabricated on P-type epitaxial silicon on a P+ silicon substrate. The second device is a iv much different 150 V SOI Resurf LDMOS fabricated on a 1.0 micron thick N-type silicon-on-insulator substrate with a 1.0 micron thick buried silicon dioxide layer on an N-type silicon handle wafer. Each device contains internal features, layout techniques, and process methods designed to improve single event and total ionizing dose radiation hardness. Technology computer aided design (TCAD) software was used to develop the transistor design and fabrication process of each device and also to simulate the device response to heavy ion radiation. Using these simulations in conjunction with experimentally gathered heavy ion radiation test data, we explain and illustrate the fundamental physical mechanisms by which destructive single event effects occur in these LDMOS devices. We also explore the design tradeoffs for making an LDMOS device resistant to destructive single event effects, both in terms of electrical performance and impact on other radiation hardness metrics