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The goal of this master project is to promote and facilitate the use of new web-based and Java-based technologies in the development of self-evaluation systems for computer science; in particular, analysis of sorting algorithms.

The purpose of the project is to use Java Server Page (JSP) technology to create a web application that could be used by any person who has the basic knowledge of browsing through the Web. There are many programs on the market that aid users in creating web pages, but the process involved in creating web pages using the available software and hosting their website is fairly complex for general people.

The goal of this project is to design a tool to help users translate any logic statement into Disjunctive Normal Form and present the result as an AND/OR TABLE, which makes the logic relation easier to express by using a two-dimensional grid of values or expressions. This tool is implemented through a web-based and Java-based application. Thus, the user can utilize this tool via World Wide Web.

Thesis (M.Sc.(Physics)) -- University of Limpopo, 2020 / Sperrylite (PtAs2), platarsite (PtAsS) and palladoarsenide (Pd2As) are platinum group minerals (PGMs) predominantly found in the Platreef Bushveld Complex in South Africa, which is one of the leading countries with highest percentages of platinum group minerals. In this study the density functional theory (DFT), embodied in the Vienna Ab-initio Simulation Package (VASP) code, was employed to investigate the structural, thermodynamically, elastic, mechanical, vibrational, electronic and surface properties of cubic PtAs2 and PtAsS, and monoclinic Pd2As mineral structures. The PtAsS was investigated from both virtual crystal approximations (VCA) solid solution within the Cambridge Serial Total Energy Package (CASTEP) code and the VASP cluster expansion (CE) approach. The cluster expansion phase stability was employed to generate new stable system of PtAsS model and from the cluster expansion binary ground state diagram we found a greater stability at 50/50 percentage (x = 0.5) of PtAsS where As and S atoms were equally distributed with formation of S-As dimer bond at the centre. The calculated lattice parameters were well reproduced and agreed with the available experimental data. The binary ground state diagram also showed that all structures have negative heats of formation (∆Hf), hence they were thermodynamically stable (miscible constituents). The calculated heats of formation predicted that PtAs2 was more stable than the PtAsS and the order of stability for cubic structures decreased as: PtAs2 > PtAsS (VCA) > PtAsS (CE).The elastic constants indicated mechanically stability for all structures and the phonon dispersion curves showed no soft modes for PtAs2, PtAsS (CE) and Pd2As, suggesting stability. Moreover, the elastic instability (negative Cij) was observed in the PtAsS (VCA) structure. We also observed that the Pd2As and PtAsS (CE) were ductile, while PtAs2 and PtAsS (VCA) were brittle. The calculated Young modulus indicated that PtAs2 was much stiffer compared to PtAsS models. This suggested that PtAs2 was mechanically stronger among all the cubic structures. The PtAs2 was a dominant covalently bonded compound whereas PtAsS and Pd2As were predicted as ionic bonded. The computed Bader charges for the bulk and surface PtAs2, PtAsS (CE) and Pd2As and Mulliken atomic charges for PtAsS (VCA) showed different behaviour. The Pt and Pd species showed negative charges, while As species showed a positive charge for PtAs2 and Pd2As. The PtAsS (CE) showed a negative charge for Pt and S species, while the PtAsS (VCA) showed a negative and a positive charges for Pt and As/S species. The calculated total density of states (TDOS) for the bulk PtAsS and Pd2As showed a metallic behaviour since there was no band gap at the Fermi energy (EF). The PtAs2 model was observed as a semiconductor with a band gap of 0.104 eV. From the DOS, PtAs2 was found the most stable since it had less contribution of DOS at the EF, while PtAsS and Pd2As structures showed least stability due to highest DOS at the EF. The understanding of the aspects of surface stability and preferred surface cleavage were investigated starting from surface terminations and then slab thickness for (100), (110) and (111) surfaces of all mineral structures. We found that (100) surface was the most stable, displaying the lowest positive surface energy for all the PtAs2, PtAsS and Pd2As minerals and was considered as the working surface. The order of surface stability decreased as: (100) > (111) > (110) for PtAs2 and PtAsS (VCA and CE) mineral systems and (100) > (110) > (111) for Pd2As system. Interestingly we found that the surface energies of the PtAsS (VCA) were smaller than for PtAsS (CE), which indicated that the VCA was more stable than the CE. The (100) surface was the most dominant on the surface morphology as expressed by the morphologies for all the mineral structures. Analysis of the DOS of the most stable (100) surface for PtAs2, PtAsS and Pd2As, we found that sperrylite and palladoarsenide showed a metallic behaviour since there was no band gap observed at the EF, while PtAsS surface structures showed a semiconductor behaviour due to presence of band gaps of 0.142 eV and 0.551 eV for PtAsS (CE) and PtAsS (VCA), respectively. The PtAsS (VCA) was found the most stable, while Pd2As was found the least stable. In addition, the intermediate stability was found for PtAsS (CE) and PtAs2 surface structures. These findings gave more insights on the stability of these minerals which may be applicable to their recovery / National Research Foundation (NRF) and Centre for High Performance Computing (CHPC)

The purpose of this thesis was the development of a generalized structural-dynamics computer program to calculate the response of multi-degree-of-freedom systems. The user of this computer program, having a limited background in matrix algebra and vibrational analysis, can gain numerical and graphical information concerning the dynamic response of multi-degree-of-freedom structures. The user, with a minimal amount of FORTRAN experience, will find this thesis ideally suited for his needs.

A vast amount of software, from low-level systems code to high-performance applications, is written in memory-unsafe languages such as C and C++. The lack of memory safety in C/C++ can lead to severe consequences; a simple buffer overflow can result in code or data corruption anywhere in the program memory. The problem is even worse in systems that constantly operate on inputs of unknown trustworthiness. For example, in 2021 a memory safety vulnerability was discovered in sudo, a near-ubiquitous utility available on major Unix-like operating systems. The vulnerability, which remained silent for over 10 years, allows any unprivileged user to gain root privileges on a victim machine using a default sudo configuration. As memory-safe languages are unlikely to displace C/C++ in the near future, efficient memory safety mechanisms for both existing and future C/C++ code are needed. Both industry and academia have proposed various techniques to address the C/C++ memory safety problem over the last three decades, either by software-only or hardware-assisted solutions. Software-only techniques such as Google’s AddressSanitizer are used to detect memory errors during the testing phase before products are shipped. While sanitizers have been shown to be effective at detecting memory errors with little effort, they typically suffer from high runtime overheads and increased memory footprint. Hardware-assisted solutions such as Oracle’s Application Data Integrity (ADI) and ARM’s Memory Tagging Extension (MTE) have much lower performance overheads, but they do not offer complete protection. Academic proposals manage to minimize the performance costs of memory safety defenses while maintaining fine-grained security protection. Unfortunately, state-of-the-art solutions require complex metadata that increases the program memory footprint, complicates the hardware design, and breaks compatibility with the rest of the system (e.g., unprotected libraries). To address these problems, the research within this thesis innovates in the realm of compiler transformations and hardware extensions to improve the state of the art in memory safety solutions. Specifically, this thesis shows that leveraging common software trends and rethinking computer microarchitectures can efficiently circumvent the problems of traditional memory safety solutions for C and C++. First, I present a novel cache line formatting technique, dubbed Califorms. Califorms builds on a concept called memory blocklisting, which prohibits a program from access- ing certain memory regions based on program semantics. State-of-the-art hardware-assisted memory blocklisting, while much faster than software blocklisting, creates memory fragmentation for each use of the blocklisted location. To prevent this issue, Califorms encodes the metadata, which is used to identify the blocklisted locations, in the blocklisted (i.e., dead) locations themselves. This inlined metadata can be then integrated into the microarchitecture by changing the cache line format. As a result, both the metadata and data are fetched together, eliminating the need for extra memory accesses. Hence, Califorms reduces the performance overheads of memory safety while providing byte-granular protection and maintaining very low hardware overheads. Secondly, I explore how leveraging common software trends can reduce the performance and memory costs of memory permitlisting (also known as base & bounds). Thus, I present No-FAT, a novel technique for enforcing spatial and temporal memory safety. The key observation that enables No-FAT is the increasing adoption of binning allocators. No-FAT, when used with a binning allocator, is able to implicitly derive an allocation’s bounds information (i.e., the base address and size) from the pointer itself without relying on expensive metadata. Moreover, as No-FAT’s memory instructions are aware of allocation bounds information, No-FAT effectively mitigates certain speculative attacks (e.g., Spectre-V1, which is also known as bounds checking bypass) with no additional cost. While No-FAT successfully detects memory safety violations, it falls short against physical attacks. Hence, I propose C-5, an architecture that complements No-FAT with strong data encryption. C-5 strictly uses access control in the L1 cache and encrypts program data at the L1-L2 cache interface. As a result, C-5 mitigates both in-process and physical attacks without burdening system performance. In addition to memory blocklisting and permitlisting, a cost-effective way to alleviate the memory safety threats is by deploying exploit mitigation techniques (e.g., Intel’s CET and ARM’s PAC). Unfortunately, current exploit mitigations offer incomplete security protection in order to save on performance. This thesis investigates potential opportunities to boost the security guarantees of exploit mitigations while maintaining their low overheads. Thus, I present ZeRØ, a hardware primitive that preserves pointer integrity at no performance cost, effectively mitigating pointer manipulation attacks such as ROP, COP, JOP, COOP, and DOP. ZeRØ proposes unique memory instructions and a novel metadata encoding scheme to protect code and data pointers from memory safety violations. The combination of instructions and metadata allows ZeRØ to avoid explicitly tagging every word in memory. On 64-bit systems, ZeRØ encodes the pointer type and location in the currently unused upper pointer bits. This way ZeRØ reduces the performance overheads of enforcing pointer integrity to zero while requiring simple hardware modifications. Finally, although current mitigation techniques excel at providing efficient protection for high-end devices, they typically suffer from significant performance and energy overheads when ported to the embedded domain. As a result, there is a need for developing new defenses that (1) have low overheads, (2) provide high security coverage, and (3) are especially designed for embedded devices. To achieve these goals I present EPI, an efficient pointer integrity mechanism that is tailored to microcontrollers and embedded devices. Similar to ZeRØ, EPI assigns unique tags to different program assets and uses unique memory instructions for accessing them. However, EPI uses a 32bit friendly encoding scheme to inline the tags within the program data. EPI introduces runtime overheads of less than 1%, making it viable for embedded and low-resource systems.

Artificial neural networks are increasing in power, with attendant increases in demand for efficient processing. Performance is limited by clock speed and degree of parallelization available through multi-core processors and GPUs. With a design tailored to a specific network, a field-programmable gate array (FPGA) can be used to minimize latency without the need for geographically distributed computing. However, the task of programming an FPGA is outside the realm of most data scientists. There are tools to program FPGAs from a high level description of a network, but there is no unified interface for programmers across these tools. In this thesis, I present the design and implementation of NeuralSynth, a prototype Python framework which aims to bridge the gap between data scientists and FPGA programming for neural networks. My method relies on creating an extensible Python framework that is used to automate programming and interaction with an FPGA. The implementation includes a digital design for the FPGA that is completed by a Python framework. Programming and interacting with the FPGA does not require leaving the Python environment. The extensible approach allows multiple implementations, resulting in a similar workflow for each implementation. For evaluation, I compare the results of my implementation with a known neural network framework. / Includes bibliography. / Thesis (M.S.)--Florida Atlantic University, 2020. / FAU Electronic Theses and Dissertations Collection

This thesis presents Lighthouse, an experimental branch of the Haskell-based House operating system which integrates Li et al.'s Lightweight Concurrency framework. First and foremost, it improves House's viability as a "real operating system" by providing a new extensible scheduler framework which makes it easy to experiment with different scheduling policies. In particular, Lighthouse extends Concurrent Haskell with thread priority and implements a priority-based scheduler which significantly improves system responsiveness when compared with GHC's normal round-robin scheduler. Even while doing this, it improves on House's claim of being "written in Haskell" by moving a whole subsystem out of the complex C-based runtime system and into Haskell itself. In addition, Lighthouse also includes an alternate, simpler implementation of Lightweight Concurrency which takes advantage of House's unique setting (running directly on uniprocessor x86 hardware). This experience sheds light on areas that need further attention before the system can truly be viable---primarily interactions between blackholing and interrupt handling. In particular, this thesis uncovers a potential case of self-deadlock and suggests potential solutions. Finally, this work offers further insight into the viability of using high-level languages such as Haskell for systems programming. Although laziness and blackholing present unique problems, many parts of the system are still much easier to express in Haskell than traditional languages such as C.

Type classes, first proposed during the design of the Haskell programming language, extend standard type systems to support overloaded functions. Since their introduction, type classes have been used to address a range of problems, from typing ordering and arithmetic operators to describing heterogeneous lists and limited subtyping. However, while type class programming is useful for a variety of practical problems, its wider use is limited by the inexpressiveness and hidden complexity of current mechanisms. We propose two improvements to existing class systems. First, we introduce several novel language features, instance chains and explicit failure, that increase the expressiveness of type classes while providing more direct expression of current idioms. To validate these features, we have built an implementation of these features, demonstrating their use in a practical setting and their integration with type reconstruction for a Hindley-Milner type system. Second, we define a set-based semantics for type classes that provides a sound basis for reasoning about type class systems, their implementations, and the meanings of programs that use them.