Recently extensive efforts have been spent in order to achieve all silicon based photonic devices exploiting the efficient light emission from nanostructured silicon systems. In this thesis, silicon based nanostructures have been investigated for electro-optical and photovoltaic applications. The thesis focused on three application areas of silicon nanostructures: Light emitting diode (LED), light modulation using quantum confined Stark effect (QCSE) and photovoltaic applications. In the context of LED applications, ZnO nanocrystal/silicon heterojunctions were investigated. Contrary to observation of pure ultraviolet photoluminescence (PL) from ZnO nanocrystals that were synthesized through vapor liquid solidification (VLS) method, visible emissions were observed in the electroluminescence (EL) due to defect states of ZnO. The discrepancy between these emissions could be ascribed to both change in excitation mechanisms and the defect formation on ZnO nanocrystals surface during device fabrication steps. EL properties of silicon nanocrystals embedded in SiO2 matrix were also systematically studied with and without Tb doping. Turn-on voltage of the Tb doped LED structures was reduced below 10 V for the first time. Clear observation of QCSE has been demonstrated for the first time in Si nanocrystals embedded in SiO2 through systematic PL measurements under external electric field. Temperature and size dependence of QCSE measurements were consistently supported by our theoretical calculations using linear combination of bulk Bloch bands (LCBB) as the expansion basis. We have managed to modulate the exciton energy as high as 80 meV with field strength below MV/cm. Our study could be a starting point for fabrication of electro-optical modulators in futures for all silicon based photonic applications. In the last part of the thesis, formation kinetics of silicon nanowires arrays using a solution based novel technique called as metal assisted etching (MAE) has been systematically studied over large area silicon wafers. In parametric studies good control over nanowire formation was provided. Silicon nanowires were tested as an antireflective layer for industrial size solar cell applications. It was shown that with further improvements in surface passivation and contact formation, silicon nanowires could be utilized in very efficient silicon solar cells.

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La photonique silicium est un domaine de recherche en pleine expansion depuis quelques années. Elle est envisagée comme une solution prometteuse pour le remplacement des interconnexions électriques par des liens optiques. A terme, l’intégration de l’optique et de l’électronique sur les mêmes puces doit permettre une augmentation des performances des circuits intégrés, et ainsi proposer des composants à hautes performances et à bas coût. Dans ce contexte, les travaux menés durant ma thèse ont porté plus spécifiquement sur l’étude de la modulation optique autour de la bande interdite directe et à température ambiante des structures à puits quantiques Ge/SiGe, par effet Stark confiné quantiquement (ESCQ). Des simulations électriques et optiques ont été menées pour concevoir un modulateur fonctionnant à la longueur d’onde de 1.3μm. La fabrication et la caractérisation de ce dispositif a permis de démontrer une modulation efficace autour de 1.3μm avec des taux de modulation atteignant 6 dB avec un dispositif de 50 µm de long. Le second objectif de mon travail a été de concevoir un modulateur intégré sur une plateforme SOI, bénéficiant de structures passives performantes et compactes. La démonstration de l’ESCQ sur une structure à puits quantique Ge/SiGe épitaxiée sur un substrat homogène de 360 nm a ouvert la voie à cette intégration. Des simulations ont été menées pour démontrer la possibilité de réaliser un couplage vertical évanescent entre un guide optique SOI et la structure Ge/SiGe, et pour évaluer les performances de ce dispositif. Un procédé technologique de fabrication a ensuite été défini et toutes les étapes ont été optimisées pour la réalisation du modulateur intégré avec les guides d’onde. Principalement six étapes de lithographies électroniques, et quatre étapes de gravure sont nécessaires. Les résultats préliminaires obtenus avec ces dispositifs sont présentés. Les perspectives de ce travail de thèse concernent la réalisation de circuits intégrés photoniques complexes, intégrant modulateurs, photodétecteurs et structures passives sur le même circuit. / Silicon photonics has generated a great interest for several years, for applications from long-haul optical telecommunication to intra-chip interconnects. The ultimate integration of optics and electronics on the same chip would allow an increase of the integrated circuit performances at low cost. In this context, the work done during my Ph.D is focused on the study of optical modulation around the direct bandgap of Ge/SiGe quantum well structures, at room temperature, by Quantum Confined Stark effect (QCSE). Electrical and optical simulations have been used to design a modulator operating at 1.3μm. Such device has been fabricated and characterized, demonstrating an extinction ratio up to 6 dB using a 50 µm-long structure. The second objective of my work was to design and demonstrate a modulator integrated on SOI waveguide. The demonstration of an efficient QCSE in Ge/SiGe quantum wells grown on the top of a 360nm homogeneous virtual substrate has paved the way for such integration. Simulations were conducted to demonstrate the feasibility of an evanescent vertical coupling between an SOI optical waveguide and a Ge/SiGe active region and to evaluate the performance of this device. A technological process has then been proposed to fabricate the devices. All steps have been optimized for the fabrication of the modulator integrated with the waveguides. Mainly six electronic beam lithography and four etching steps were used. Preliminary experimental results obtained with such component are presented. This work paves the way to the demonstration of complex photonic integrated circuits, including modulators, photodetectors and passive structures on the same chip.