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First of all the Internet pages presenting C++ Builder teaching material, are studied in the Master’s thesis. Applied themes are stressed the most of which is lacking in those pages. The aim of the work is – to describe the uses of C++ Builder tools that is - components of various format files (*.bmp, *.wmf, *.emf, *.ico, etc.) used to show images, graphic objects in the form of the program, which can show drawings, schemes, drafts; reading and drawing of random sequences, geometrical figures, function, drawing of analytically given functions and data presented by number sequences, the speech signals and other the sound files. Some examples of reading listening and viewing of the different sound files are also presented. The other important for applications subjects, as databases and programming of connections with databases, problem solutions in the form of algorithms, are also described The optimum algorithms “Division in half” and “Golden section” algorithms are realized in C++ Builder.

This report will look at optimization under parameters of uncertainties. It will describe the subject in its wider form, then two model examples will be studied, followed by an application to an ABB product. The Monte Carlo method will be described and scrutinised, with the quasi-Monte Carlo method being favoured for large problems. An example will illustrate how the choice of Monte Carlo method will affect the efficiency of the simulation when evaluating  functions of different dimensions. Then an overview of mathematical optimization is given, from its simplest form to nonlinear, nonconvex  optimization problems containing uncertainties.A Monte Carlo simulation is applied to the design process and cost function for a custom made ABB transformer, where the production process is assumed to contain some uncertainties.The result from optimizing an ABB cost formula, where the in-parameters contains some uncertainties, shows how the price can vary and is not fixed as often assumed, and how this could influence an accept/reject decision.

An infinitesimal fraction of the practically infinite sequence space has achieved enormous functional diversity of proteins during evolution. Intrinsically disordered proteins (IDPs) which lack a fully defined three-dimensional structure are the most likely precursors to today's proteins because of their flexible conformation and functional diversity. But how have these proteins evolved into often rigid and highly specialized protein structures? This evolutionary trajectory has the greatest support in the theory of induced fold whereby the development of the structure was mediated by the interaction and coevolution of primordial unstructured proteins with different cofactors or RNA molecules. Although some random sequences from the sequence space which is not used by nature are also able to form folded proteins the more suitable candidates for evolution of structure and function appear to be random sequences with a high content of disordered which have low aggregation propensity. The selected random protein sequences with high disorder content have been structurally characterized in this work for their further use in evolutionary studies. Three artificial proteins were selected from a random-sequence library based on previous study in our laboratory. In the present work they were purified and...

This work presents a new test case generation methodology, which has a high degree of automation (cost reduction); while providing increased power in terms of defect detection (benefits increase). Our solution is a variation of model-based testing, which takes advantage of symbolic grammars (a context-free grammar where terminals are replaced by regular expressions that represent their solution space) and quasi-random sequences to generate test cases. Previous test case generation techniques are enhanced with adaptive random testing to maximize input space coverage; and selective and directed sentence generation techniques to optimize sentence generation. Our solution was tested by generating 200 firewall policies containing up to 20 000 rules from a generic firewall grammar. Our results show how our system generates test cases with superior coverage of the input space, increasing the probability of defect detection while reducing considerably the needed number the test cases compared with other previously used approaches. / Software Engineering and Intelligent Systems

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Made available in DSpace on 2016-03-15T19:38:13Z (GMT). No. of bitstreams: 1 Fabio Siqueira Netto.pdf: 2272002 bytes, checksum: 7297f517b86e3947fb245ac2f4a404b0 (MD5) Previous issue date: 2009-08-05 / Fundo Mackenzie de Pesquisa / Spread sprectrum is a modulation technique that uses a binary sequence to spread an information signal in frequency domain. Conventionally, the process of spreading uses pseudo-random sequences created by shift-registers. However, sequences created using chaotic signals can also be employed because they have compatible spectral and autocorrelation properties and their generation is easy. This work compares the pseudo-random sequences generated conventionally and using chaotic signals, which are used in communication systems based on spread spectrum. These comparisons are made in terms of autocorrelation and cross correlation functions, power spectral density estimated, computational complexity of generators and bit error rate. Our results confirm that the pseudo-random sequences created by chaotic signals can be used in spread spectrum systems. However, there is a critical point: the choice of non-linear map and its initial conditions affect their performance. / O espalhamento espectral é uma técnica de modulação que usa uma seqüência binária para espalhar um sinal de informação no domínio da freqüência. Convencionalmente, o processo de espalhamento é realizado por seqüências pseudoaleatórias geradas por registradores de deslocamento. Porém, seqüências criadas a partir de sinais caóticos também podem ser usadas, pois apresentam propriedades espectrais e de autocorrelação compatíveis, podendo ser geradas de forma simples. Este trabalho compara os geradores de seqüências pseudoaleatórias convencionais e baseadas em caos, ambas aplicadas em sistemas de comunicação por espalhamento espectral. Tais comparações são feitas em termos das funções de autocorrelação e correlação cruzada, de estimativas da densidade espectral de potência, da complexidade computacional dos geradores e da taxa de erro de bit. Os resultados desta dissertação ratificam que as seqüências pseudoaleatórias criadas a partir de sinais caóticos podem ser usadas em sistemas de espalhamento espectral. Porém, um ponto crítico do uso de caos em seqüências pseudoaleatórias é a escolha do mapa não-linear e das suas condições iniciais, pois esta escolha influencia o desempenho do sistema.

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Third generation mobile communication systems promise a greater data rate and new services to the mobile subscribers. 3G systems support up to 2 Mbps of data rate to a fixed subscriber and 144 Kbps of data rate to a fully mobile subscriber. Code Division Multiple Access (CDMA) is the air interface access scheme widely used in all the 3G communication systems. This access scheme has many inherent advantages m terms of noise immunity, security, coherent combining of multi path signals etc. But all these advantages come at the expense of higher complexity of the receivers. The receivers form the major portion of the processing involved in a base station. The heart of any CDMA receiver is the RAKE. The RAKE receiver separates the different multi-paths received by the antenna by using the properties of the Pseudo Random sequences. The phase and strength of each of these path signals is measured and are used by the coherent combiner, which de-rotates all the signals to a single reference and coherently combines them In general the Base station receivers make use of the top three multi-path signals ranked in terms of their signal energy Hence four RAKE fingers, each catering to single multi-path are needed for receiving a single code channel (3 for coherent combining and one for scanning). One such channel receiver requires a processing power of 860 MIPS (Mega Instructions Per Second). Some of the CDMA standards support up to 90 code channels at the same time. This means that the total processing power required at the base station is about 80 GIPS. This much of processing power will require large number of high end DSPs, which will be a very costly solution. In the current base station architectures these blocks are implemented using ASICs, which are specific to a particular standard and also the algorithms used for the different operations are fixed at the design time itself. This solution is not flexible and is not amenable for SDR (Software defined Radio) architectures for the Base stations. This thesis proposes a Co-Processor solution, which can be attached to a generic DSP or any other processor. The processor can control the Co-Processor by programming its parameter registers using memory mapped register accesses. This co-processor implements only those blocks, which are compute intensive. This co-processor performs all chip-rate processing functions involved m a RAKE receiver. All the symbol-rate functions are implemented through software in the processor. This provides more choices m selecting the algorithms for timing recovery and scanning. The algorithms can be changed through software even after the base station is installed in the field. All the inputs and outputs of the Co-Processor are passed through dual port RAMs with independent read and write clocks. This allows the Co-Processor and the processor to be running on two independent clocks. This memory scheme also increases the throughput as the reads and writes to these memories can happen simultaneously. This thesis introduces a concept of incorporating programmable PN/Gold code generators as part of the Co-Processor, which significantly reduces the amount of memory required to store the Scrambling and Spreading codes. The polynomial lengths as well as the polynomials of the code generator are programmable. The input signal memory has a bus width equal to 4 times the bus width of the IQ signal bus width (4 * 24 = 96 bits) towards the Co-Processor to meet the huge data bandwidth requirement. This memory is arranged as word interleaved memory banks. This can supply one word per memory bank on each clock cycle as long as the accessed words fall in different memory banks. The number of banks is chosen as more than twice that of the number of Correlators/ Rake fingers. This gives more flexibility in choosing the address offsets to different Correlator inputs. This flexibility allows one to use different timing recovery schemes since the number of allowable address offsets for different Correlators is more. The overall complexity of the solution is comparatively less with respect to the generic DSP based solution and much easier to modify for a different standard, when compared to the rigid ASIC based solution. The proposed solution is significantly different from the conventional way of designing the Base station with fixed ASICs and it clearly outweighs the solutions based on conventional approach in terms of flexibility, design complexity, design time and cost.