Os sistemas de proteção dos elementos da rede elétrica desempenham um papel de fundamental importância na segurança e confiabilidade dos sistemas de potência. A não atuação ou a atuação incorreta dos relés de proteção durante uma falta localizada em um componente da rede pode transformar-se em um evento sistêmico de grandes proporções (blecaute). Esses eventos trazem riscos e elevados prejuízos econômicos à sociedade. A proteção dos geradores síncronos, apesar do alto custo e complexidade deste tipo de equipamento, não recebe a mesma atenção na literatura que a dedicada à proteção de outros elementos da rede, como, por exemplo, a das linhas de transmissão. Isso decorre do menor número de geradores existentes na rede e também da ideia que as faltas neste tipo de equipamento são menos frequentes. Este trabalho aborda os principais aspectos envolvidos com o projeto de um sistema de proteção para geradores síncronos de grande porte. Incialmente, discutese os principais conceitos associados com os geradores, de interesse para a tarefa de proteção. Particular atenção é dedicada às formas de aterramento e aos critérios adotados para projeto do resistor de aterramento utilizado nesse equipamento. Em seguida, apresentam-se as principais funções de proteção aplicáveis aos geradores, particularmente aquelas voltadas para a detecção de faltas nos enrolamentos do estator. Discute-se também os critérios de ajustes dos parâmetros dessas funções. Descreve-se o uso de uma plataforma laboratorial, baseada em simulador de tempo real (RTDS), para ensaio e análise do sistema de proteção visando validar seu correto desempenho frente às possíveis condições operativas que podem ser encontradas em campo. Finalmente, utilizando os conceitos desenvolvidos ao longo do trabalho, desenvolve-se um estudo de caso, onde é realizado o projeto e implementação do sistema de proteção dos geradores de uma usina hidrelétrica hipotética. Para avaliar e analisar o desempenho do sistema de proteção dessa rede exemplo, parametrizou-se o IED G60 (GE) e realizou-se inúmeras simulações na plataforma de testes proposta. / Protection systems play a critical role in the safety and reliability of electric power systems. The non-operation or wrong operation of protective relays during a fault in a network element can evolve to a systemic event in large scale (blackout). These events bring risks and high economic losses to society. Despite the high cost and complexity, the protection of synchronous generators has not received much attention in the literature devoted to protection of other network elements, such as transmission lines. This stems from the smaller number of generators in the network and also the idea that the faults in this type of equipment are less frequent. This research discusses the main aspects involved in the design of a protection system for large synchronous generators. Initially, it discusses the key concepts of interest to the generation protection. Particular attention is given to grounding techniques and the criteria adopted for the design of grounding resistors used in those equipment. Then the main protection functions applicable to generators are presented, particularly those related to fault detection in the stator windings. The criteria for setting the parameters of these functions are also discussed. After that, the use of a laboratory shelf, based on Real-Time Digital Simulator (RTDS) for testing and analysis of the protection system, is described in order to validate the correct performance in face of possible operating conditions in the field. Finally, a study case is developed using the concepts developed throughout the research. Then, the design and implementation of the protection system of generators of a hypothetical hydroelectric plant are carried out. To evaluate and analyze the performance of this example network protection system, parameterized up IED G60 (GE) and held numerous simulations in the proposed test platform.

Este trabalho apresenta uma análise de algoritmos computacionais aplicados à estimação de fasores elétricos em SEPs. A medição dos fasores é realizada por meio da alocação de Unidades de Medição Fasorial nestes sistemas e encontra diversas aplicações nas áreas de operação, controle, proteção e planejamento. Para que os fasores possam ser aplicados, são definidos padrões de medição, sincronização e comunicação, por meio da norma IEEE C37.118.1. A norma apresenta os padrões de mensagens, timetag, fasores, sistema de sincronização, e define testes para avaliar a estimação. Apesar de abranger todos esses critérios, a diretriz não define um algoritmo de estimação padrão, abrindo espaço para uso de diversos métodos, desde que a precisão seja atendida. Nesse contexto, o presente trabalho analisa alguns algoritmos de estimação de fasores definidos na literatura, avaliando o comportamento deles em determinados casos. Foram considerados, dessa forma, os métodos: Transformada Discreta de Fourier, Método dos Mínimos Quadrados e Transformada Wavelet Discreta, nas versões recursivas e não-recursivas. Esses métodos foram submetidos a sinais sintéticos, a fim de verificar o comportamento diante dos testes propostos pela norma, avaliando o Total Vector Error, tempo de resposta e atraso e overshoot. Os algoritmos também foram embarcados em um hardware, denominado PC104, e avaliados de acordo com os sinais medidos pelo equipamento na saída analógica de um simulador em tempo real (Real Time Digital Simulator). / This work presents an analysis of computational algorithms applied to phasor estimation in Electrical Power Systems. The phasor estimation process uses the allocation of Phasor Measurement Units in the system and the measures can be used in many control, operation, planing and protection applications. Therefore, the power system phasors are very useful, specially if they have a common time reference, allowing the determination of the system\'s condition at a given time. The procedures necessary for power system\'s phasors estimation and application are defined by IEEE C37.118.1 standard. The standard defines the requirements for phasor estimation, presenting tests and a methodology to evaluate the algorithms performance. Thus, the standard defines the time tag and data patterns, some synchronization methods, and message examples, simplifying the communication requirements. Despite defining all these parts, the standard does not state which estimation algorithm should be used, making room for the use of various methods, since the standard precision is met. In this context, this work analyzes some phasor estimation algorithms defined in the literature, evaluating their behavior for some cases. It was adopted the recursive and non-recursive versions of the methods: Discrete Fourier Transform, Least Squares and Discrete Wavelet Transform. They were submitted to the standard signals, evaluating the Total Vector Error, time delays, and overshoots. The algorithms were also embedded in hardware (named PC104) and evaluated by real time simulated signals, measured by the PC104 using the analog outputs of a Real Time Digital Simulator.

This thesis proposes a novel out-of-step protection technique using the state-plane representation of the generator speed and power angle. The critical clearing angle is computed using the principle that the total energy of the system at the instant the fault is cleared should be equal to the maximum potential energy of the system. The critical clearing time corresponding to this value of critical clearing angle is obtained directly using the time calibration of the relative speed versus power angle solution curve. The simultaneous calculation of the critical clearing angle and the time makes the proposed state plane approach much faster than the two-blinder scheme, Equal Area Criterion (EAC) method, rate of change of impedance method, the Swing Center Voltage (SCV) technique, transient energy calculation method, and the frequency deviation calculation from voltage signal method discussed in the literature. The proposed state plane prediction scheme is used to detect the rst swing out-of-step condition in single machine in nite bus (SMIB) system as well as larger power system con gurations (two-area and IEEE 39-bus test systems) using system wide information. A coherency analysis is performed in a multi-machine system to find out the two critical groups of generators. The critical generator groups are then represented with a SMIB equivalent system, and the state plane algorithm is applied to the reduced equivalent. Electromagnetic transient simulations are carried out using PSCAD/EMTDCTM to test the proposed algorithm in the above discussed test systems. The simulation studies show that the proposed method is computationally e cient, and accurate even for the larger power systems. The technique also does not require any o ine studies. This thesis also proposes another out-of-step protection technique using generator state deviations to detect multi-swing instability conditions in power system. It uses wide-area measurements of generator electrical power and speed deviations as inputs to the proposed scheme to detect instability. This technique is not as fast as the state plane approach but can predict multi-swing instability conditions in power system. The state plane method and state deviation method are used together to nd rst swing and multi-swing instability conditions. Two-area power system con guration is used to demonstrate multi-swing instability prediction. Di erent power swing conditions such as stable, rst swing unstable and multi-swing unstable scenarios are created and the proposed techniques are tested to verify their performance. The proposed techniques are also compared with the conventional two blinder technique. A facility for hardware-in-the-loop testing of the relays using a digital simulator is available in the Power System Laboratory at the University of Saskatchewan. An out-of-step relay module is developed in a digital signal processing board (ADSP BF533TM from Analog Devices Inc.) and a closed loop test is performed using the real time digital simulator (RTDSTM). The simulator mimics the power system behaviour in real time, and the analog time signals from simulator can be communicated to the relay module. The relay can also feed back the signals to the simulator which can be used to operate the circuit breaker elements in the power system. The SMIB and two area systems are used to test the relay in real time. The relay prototypes for both of the proposed techniques are developed in this thesis. The hardware-in-the-loop implementation and testing show that the calculation times required for the proposed methods are small, and the state plane method especially can predict instability condition much faster than all other methods in current literature.

Video stabilization methods are classified as mechanical and digital. Mechanical methods are based on motion sensors. Digital methods are computer programs and classified into two as time domain and frequency domain based on the signal processing methods used for the motion analysis. Although, mechanical methods have good real time stabilization performance, they are not suitable for small platforms such as mobile robots. On the other hand, digital video stabilization methods are easy to implement on various hardware, however, they require high computational load and long processing time. Two different digital video stabilization methods, one frequency and one time domain algorithms, are implemented on FPGA to realize their real time performances. Also, the methods are implemented and tested in MATLAB. FPGA results are compared with MATLAB&rsquo / s to see the accuracy performance.The input video format is PAL of which frame period is 40ms. The FPGA implementation is capable of producing new stabilization data at every PAL frame which allows the implementation to be classified as real time. Also, the simulation and hardware tests show that FPGA implementation can reach the MATLAB accuracy performance.

The purpose of this research is to develop a method of making system equivalents for the Real Time Digital Simulator (RTDS), which should enhance its capability of simulating large power systems. The proposed equivalent combines a Frequency Dependent Network Equivalent (FDNE) for the high frequency electromagnetic transients and a Transient Stability Analysis (TSA) type simulation block for the electromechanical transients. The frequency dependent characteristic for FDNE is obtained by curve-fitting frequency domain admittance characteristics using the Vector Fitting method. An approach for approximating the frequency dependent characteristic of large power networks from readily available typical power-flow data is also introduced. A new scheme of incorporating TSA solution in RTDS is proposed. This report shows how the TSA algorithm can be adapted to a real time platform. The validity of this method is confirmed with examples, including the study of a multi in-feed HVDC system based network.

The purpose of this research is to develop a method of making system equivalents for the Real Time Digital Simulator (RTDS), which should enhance its capability of simulating large power systems. The proposed equivalent combines a Frequency Dependent Network Equivalent (FDNE) for the high frequency electromagnetic transients and a Transient Stability Analysis (TSA) type simulation block for the electromechanical transients. The frequency dependent characteristic for FDNE is obtained by curve-fitting frequency domain admittance characteristics using the Vector Fitting method. An approach for approximating the frequency dependent characteristic of large power networks from readily available typical power-flow data is also introduced. A new scheme of incorporating TSA solution in RTDS is proposed. This report shows how the TSA algorithm can be adapted to a real time platform. The validity of this method is confirmed with examples, including the study of a multi in-feed HVDC system based network.

Technology is integrated into daily life more than before as it evolves through communication area. In the past, it started with audio devices that help us to communicate while far between two ends of communication line. Nowadays visual communication comes in front considering the communication technology. This became possible with the improvement in the compression techniques of visual data and increasing speed, optimized architecture of the new family processors. These type processors are named as Digital Signal Processors (DSP&rsquo / s). Texas Instruments TMS320C6000 Digital Signal Processor family offers one of the fastest DSP core in the market. TMS320C64x sub-family processors are newly developed under the TMS320C6000 family to overcome disadvantages of its predecessor family TMS320C62x. TMS320C64x family has optimized architecture for packed data processing, improved data paths and functional units,improved memory architecture and increased speed. These capabilities make this family of processors good candidate for real-time video processing applications. Advantages of this core are used for implementing newly established H.264 Recommendation. Highly optimizing C Compiler of TMS320C64x enabled fast running implementation of encoder blocks that bring heavy computational load to encoder. Such as fast implementation of Motion Estimation, Transform, Entropy Coding became possible. Simplified Densely Centered Uniform-P Search algorithm is used for fast estimation of motion vectors. Time taking parts enhanced to improve the performance of the encoder.

abstract: In recent years, wide bandgap (WBG) devices enable power converters with higher power density and higher efficiency. On the other hand, smart grid technologies are getting mature due to new battery technology and computer technology. In the near future, the two technologies will form the next generation of smart grid enabled by WBG devices. This dissertation deals with two applications: silicon carbide (SiC) device used for medium voltage level interface (7.2 kV to 240 V) and gallium nitride (GaN) device used for low voltage level interface (240 V/120 V). A 20 kW solid state transformer (SST) is designed with 6 kHz switching frequency SiC rectifier. Then three robust control design methods are proposed for each of its smart grid operation modes. In grid connected mode, a new LCL filter design method is proposed considering grid voltage THD, grid current THD and current regulation loop robust stability with respect to the grid impedance change. In grid islanded mode, µ synthesis method combined with variable structure control is used to design a robust controller for grid voltage regulation. For grid emergency mode, multivariable controller designed using H infinity synthesis method is proposed for accurate power sharing. Controller-hardware-in-the-loop (CHIL) testbed considering 7-SST system is setup with Real Time Digital Simulator (RTDS). The real TMS320F28335 DSP and Spartan 6 FPGA control board is used to interface a switching model SST in RTDS. And the proposed control methods are tested. For low voltage level application, a 3.3 kW smart grid hardware is built with 3 GaN inverters. The inverters are designed with the GaN device characterized using the proposed multi-function double pulse tester. The inverter is controlled by onboard TMS320F28379D dual core DSP with 200 kHz sampling frequency. Each inverter is tested to process 2.2 kW power with overall efficiency of 96.5 % at room temperature. The smart grid monitor system and fault interrupt devices (FID) based on Arduino Mega2560 are built and tested. The smart grid cooperates with GaN inverters through CAN bus communication. At last, the three GaN inverters smart grid achieved the function of grid connected to islanded mode smooth transition / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017

Thesis submitted in fulfilment of the requirements for the degree Master of Technology: Electrical Engineering in the Faculty of Engineering at the Cape Peninsula University of Technology 2013 / The demand for electrical energy has kept on increasing, thus causing power systems to be more complex and bringing the challenging problems of electrical energy generation, transmission, stability, as well as storage to be examined more thoroughly. With the advent of high-speed computation and the desire to analyze increasingly complex behaviour in power systems, simulation techniques are gaining importance and prevalence. Nevertheless, while simulations of large, interconnected complex power systems are feasible, they remain time-consuming. Moreover, the models and parameters used in simulations are uncertain, due to measurement uncertainty, the need to represent a complex behaviour with low-order models, and the inherent changing nature of the power system. This research explores the use of a model reduction technique and the applications of a Real-Time Digital Simulator (RTDS) to reduce the uncertainty in large-scale complex power system models. The main goal of the research is to develop a reduced order model and to investigate the applications of the RTDS simulator in reduction of large, interconnected power systems models. The first stage of the study is to build and simulate the full model of the power system using the DigSILENT and RTDS simulators. The second phase is to apply model reduction technique to the full model and to determine the parameters in the reduced-order model as well as how the process of reduction increases this model uncertainty. In the third phase the results of the model reduction technique are compared based on the results of the original model - IEEE standard benchmark models has been used. The RTDS was used for comparative purposes. The thesis investigations use a particular model reduction technique as Coherency based Method. Though the method ideas are applicable more generally, a concrete demonstration of its principles is instructive and necessary. Further, while this particular technique is not relevant to every system, it does apply to a broad class of systems and illustrates the salient features of the proposed methodology. The results of the thesis can be used in the development of reduced models of complex power systems, simulation in real-time during power system operation, education at universities, and research. Keywords: IEEE benchmark models, reduced models, Coherency based Method, DigSILENT, RTDS, model uncertainty, power system stability

This thesis introduces a new modeling approach that allows very large power systems to be modeled on a real time electro-magnetic transients (EMT) digital simulator with reduced hardware costs. The key step in achieving this is the development of an improved wide-band multi-port equivalent, which reduces a large power network into a small manageable equivalent model that preserves wideband behaviors. This approach has a foundation method that use a two part equivalent in which the high frequency behavior of the equivalenced network is represented by a terminating frequency dependent network equivalent (FDNE), with the low frequency behavior being modeled using a detailed Transient Stability Analysis (TSA) model that only models the electromechanical behavior. This approach allowed the modelling of medium size electric regions up to hundreds of buses in real time. This thesis extends the equivalent by implementing a reduced order of the detailed electromechanical TSA equivalent mentioned above. Coherency based reduction is used for the electromechanical model of the power network to be equivalenced, and is implemented as a Transient Stability Analysis (TSA) type electromechanical equivalent. A challenge in implementing the FDNE is to ensure that it is a passive network, as otherwise its inclusion could lead to unstable simulation. This thesis also introduces a practical procedure to enforce passivity in the FDNE. The validity of the proposed technique is demonstrated by comparing the approach with detailed electromagnetic simulations of the well-known 39 bus New England system and a modified 39 bus system with an HVDC infeed with coupling between the dc line and an adjacent ac line, in addition to a 108 bus ac system. The power of the method is demonstrated by the real-time simulation of a large system with 2300 busses and 139 generators. It has been shown that this approach has the potential to increase by at least one order of magnitude the size of the network that can be modeled and thus on a real time electro-magnetic transients (EMT) digital simulator with reduced hardware costs.