This thesis describes the design and implementation of real-time image-processing tasks on a custom computing platform called Splash-2. The tasks that have been implemented are image histogram generation, median filtering using 3X3 neighborhoods, and morphological dilation and erosion. These problems are computationally intensive, involving large amounts of data. The problems are especially difficult when the images need to be processed at real-time rates, typically 30 frames per second. Splash-2 is a reconfigurable FFPGA-based attached processor featuring several programmable processing elements and programmable communication paths. Although not designed specifically for image-processing applications, it possesses architectural properties that make it well suited for high speed computations and data transfer rates that are characteristic of this class of problems. This thesis discusses the design process which has been used to map the tasks to Splash-2, and presents results which demonstrate the effectiveness of custom computing platforms for high performance image processing. / Master of Science

The real time multitasking systems are becoming increasingly popular for control and monitoring functions typically encountered in industry as well as day to day life. They have to manage adequately many concurrent processes or tasks, each of which is sequential in nature. The concurrency is achieved by running asynchronous tasks at different speeds and providing for communication and synchronization. In order to fully exploit the power and capabilities of today's sophisticated microprocessors and to provide a programming methodology for structuring real time applications a real time multitasking operating system becomes critical. / Master of Science

This thesis investigates a new architecture for modeling and simulating complex distributed real-time systems. Modeling adequately a large distributed real time system may involve, due to its complexity, several different theoretical vehicles such as queuing theory, finite state machines, and others. Currently there are no software tools, which would offer combining such heterogeneous features into a single comprehensive simulation environment. This study involves integrating 3 tools, SES/workbench, an offline simulator using queuing theory as its modeling discipline, ObjecTime as a real-time simulator based on finite state machines as its modeling discipline, and VxWorks real-time kernel used for free modeling in the VMEbus environment. We developed an architecture, which connects all 3 simulators into an integrated system, in which parameters and simulation results can be freely exchanged between tools. In addition, the system is enhanced by a web-based interface, which can be used to provide input and obtain output of the entire system and help in distributing the simulation over the Internet. The new architecture was extensively tested and applied to a large-scale distributed embedded simulation in a military environment.

No description available.

International Telemetering Conference Proceedings / October 23-26, 2000 / Town & Country Hotel and Conference Center, San Diego, California / Owing to rapid development of PC industry, personal computer has been surprisingly improved on reliability and speed and it has been applied to many fields, such as aerospace, satellite and telemetry applications. As we all known, two aspects decide how fast the PC-based data acquisition can be reached. One aspect is CPU processing and the other is I/O bandwidth. Indeed, the first aspect has changed increasingly insignificant because the frequency of CPU has exceeded 700MHz which can satisfy fully the need of high rate data processing. So I/O bandwidth is the only key factor of the high rate PC-based data acquisition and we must adopt efficient data buffer techniques to satisfy the demand of telemetry data entry. This paper presents a buffered data channel which use memory mapping, EPLD and Dual-Port SRAM techniques. The operation platform of this design is WINDOWS95/98 and the software includes device driver and real-time processing routines.

published_or_final_version / Electrical Engineering / Master / Master of Philosophy

published_or_final_version / Industrial and Manufacturing Systems Engineering / Master / Master of Philosophy

No description available.

No description available.

A Thesis Submitted to the Faculty 0/ Engineering, University 0/ Lite Witwatersrand, Johannesburg in fulfilment 0/ the requirements /01' the Degree 0/ Doctor 0/ Philosophy. Johannesburg 1990. / This thesis studies fault tolerant strategies for real-time distributed computer control systems so as to propose an error recovery technique that renders individual processors on the network resistant to soft failures. The technique is effective for soft failures which have as certain maximum duration, and does not require the use of specialised hardware. Attention is focused on achieving resistance to soft failures in environments which have demanding time constraints such as those found in computer systems for process control, materials handling and automated manufacturing. [Abbreviated Abstract. Open document to view full version]