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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

On the Dynamics of Epileptic Spikes and Focus Localization in Temporal Lobe Epilepsy

January 2012 (has links)
abstract: Interictal spikes, together with seizures, have been recognized as the two hallmarks of epilepsy, a brain disorder that 1% of the world's population suffers from. Even though the presence of spikes in brain's electromagnetic activity has diagnostic value, their dynamics are still elusive. It was an objective of this dissertation to formulate a mathematical framework within which the dynamics of interictal spikes could be thoroughly investigated. A new epileptic spike detection algorithm was developed by employing data adaptive morphological filters. The performance of the spike detection algorithm was favorably compared with others in the literature. A novel spike spatial synchronization measure was developed and tested on coupled spiking neuron models. Application of this measure to individual epileptic spikes in EEG from patients with temporal lobe epilepsy revealed long-term trends of increase in synchronization between pairs of brain sites before seizures and desynchronization after seizures, in the same patient as well as across patients, thus supporting the hypothesis that seizures may occur to break (reset) the abnormal spike synchronization in the brain network. Furthermore, based on these results, a separate spatial analysis of spike rates was conducted that shed light onto conflicting results in the literature about variability of spike rate before and after seizure. The ability to automatically classify seizures into clinical and subclinical was a result of the above findings. A novel method for epileptogenic focus localization from interictal periods based on spike occurrences was also devised, combining concepts from graph theory, like eigenvector centrality, and the developed spike synchronization measure, and tested very favorably against the utilized gold rule in clinical practice for focus localization from seizures onset. Finally, in another application of resetting of brain dynamics at seizures, it was shown that it is possible to differentiate with a high accuracy between patients with epileptic seizures (ES) and patients with psychogenic nonepileptic seizures (PNES). The above studies of spike dynamics have elucidated many unknown aspects of ictogenesis and it is expected to significantly contribute to further understanding of the basic mechanisms that lead to seizures, the diagnosis and treatment of epilepsy. / Dissertation/Thesis / Ph.D. Electrical Engineering 2012
12

Design And Synthesis Of Clockless Pipelines Based On Self-resetting Stage Logic

Alsharqawi, Abdelhalim 01 January 2005 (has links)
For decades, digital design has been primarily dominated by clocked circuits. With larger scales of integration made possible by improved semiconductor manufacturing techniques, relying on a clock signal to orchestrate logic operations across an entire chip became increasingly difficult. Motivated by this problem, designers are currently considering circuits which can operate without a clock. However, the wide acceptance of these circuits by the digital design community requires two ingredients: (i) a unified design methodology supported by widely available CAD tools, and (ii) a granularity of design techniques suitable for synthesizing large designs. Currently, there is no unified established design methodology to support the design and verification of these circuits. Moreover, the majority of clockless design techniques is conceived at circuit level, and is subsequently so fine-grain, that their application to large designs can have unacceptable area costs. Given these considerations, this dissertation presents a new clockless technique, called self-resetting stage logic (SRSL), in which the computation of a block is reset periodically from within the block itself. SRSL is used as a building block for three coarse-grain pipelining techniques: (i) Stage-controlled self-resetting stage logic (S-SRSL) Pipelines: In these pipelines, the control of the communication between stages is performed locally between each pair of stages. This communication is performed in a uni-directional manner in order to simplify its implementation. (ii) Pipeline-controlled self-resetting stage logic (P-SRSL) Pipelines: In these pipelines, the communication between each pair of stages in the pipeline is driven by the oscillation of the last pipeline stage. Their communication scheme is identical to the one used in S-SRSL pipelines. (iii) Delay-tolerant self-resetting stage logic (D-SRSL) Pipelines: While communication in these pipelines is local in nature in a manner similar to the one used in S-SRL pipelines, this communication is nevertheless extended in both directions. The result of this bi-directional approach is an increase in the capability of the pipeline to handle stages with random delay. Based on these pipelining techniques, a new design methodology is proposed to synthesize clockless designs. The synthesis problem consists of synthesizing an SRSL pipeline from a gate netlist with a minimum area overhead given a specified data rate. A two-phase heuristic algorithm is proposed to solve this problem. The goal of the algorithm is to pipeline a given datapath by minimizing the area occupied by inter-stage latches without violating any timing constraints. Experiments with this synthesis algorithm show that while P-SRSL pipelines can reach high throughputs in shallow pipelines, D-SRSL pipelines can achieve comparable throughputs in deeper pipelines.
13

MULTI-USER REDIRECTED WALKING AND RESETTING UTILIZING ARTIFICIAL POTENTIAL FIELDS

Hoffbauer, Cole 09 July 2018 (has links)
No description available.
14

Prediction and control of patterned activity in small neural networks

Sieling, Fred H. 23 August 2010 (has links)
Rhythmic neural activity is thought to underlie many high-level functions of the nervous system. Our goals are to understand rhythmic activity starting with small networks, using theoretical and experimental tools. Phase resetting theory describes essential properties that cause and destroy rhythms. We validate and extend one branch of this theory, testing it in bursting neurons coupled by excitation and then extending the theory to account for temporal variability found in our experimental data. We show that the theory makes good predictions of rhythmic activity in heterogeneous networks. We also note differences in mathematical structure between inhibition- and excitation-coupling that cause them to behave differently in noisy contexts and may explain why all central pattern generators (CPGs) found in nature are dominated by inhibition. Our extension of the theory gives a method that is useful to compare experimental and model data and shows that noise may either create or destroy a rhythm. Finally, we described the cellular mechanisms in Aplysia that switch the feeding CPG from arrhythmic to rhythmic behavior in response to reward stimuli. Previous studies showed that a Dopamine reward signal is correlated to changes in electrical coupling and excitability in several important neurons in the CPG. Using the dynamic clamp and an in vitro analog of the full behavioral system, we were able to determine that electrical coupling alone controls rhythmicity, while excitability independently controls the rate of activity. These results beg for further study, including new theory to explain them fully.
15

Regulation of rhythmic activity in the stomatogastric ganglion of decapod crustaceans

Soofi, Wafa Ahmed 08 June 2015 (has links)
Neuronal networks produce reliable functional output throughout the lifespan of an animal despite ceaseless molecular turnover and a constantly changing environment. The cellular and molecular mechanisms underlying the ability of these networks to maintain functional stability remain poorly understood. Central pattern generating circuits produce a stable, predictable rhythm, making them ideal candidates for studying mechanisms of activity maintenance. By identifying and characterizing the regulators of activity in small neuronal circuits, we not only obtain a clearer understanding of how neural activity is generated, but also arm ourselves with knowledge that may eventually be used to improve medical care for patients whose normal nervous system activity has been disrupted through trauma or disease. We utilize the pattern-generating pyloric circuit in the crustacean stomatogastric nervous system to investigate the general scientific question: How are specific aspects of rhythmic activity regulated in a small neuronal network? The first aim of this thesis poses this question in the context of a single neuron. We used a single-compartment model neuron database to investigate whether co-regulation of ionic conductances supports the maintenance of spike phase in rhythmically bursting “pacemaker” neurons. The second aim of the project extends the question to a network context. Through a combination of computational and electrophysiology studies, we investigated how the intrinsic membrane conductances of the pacemaker neuron influence its response to synaptic input within the framework of the Phase Resetting Curve (PRC). The third aim of the project further extends the question to a systems-level context. We examined how ambient temperatures affect the stability of the pyloric rhythm in the intact, behaving animal. The results of this work have furthered our understanding of the principles underlying the long-term stability of neuronal network function.
16

Combining over- and under-approximating program analyses for automatic software testing

Csallner, Christoph 07 July 2008 (has links)
This dissertation attacks the well-known problem of path-imprecision in static program analysis. Our starting point is an existing static program analysis that over-approximates the execution paths of the analyzed program. We then make this over-approximating program analysis more precise for automatic testing in an object-oriented programming language. We achieve this by combining the over-approximating program analysis with usage-observing and under-approximating analyses. More specifically, we make the following contributions. We present a technique to eliminate language-level unsound bug warnings produced by an execution-path-over-approximating analysis for object-oriented programs that is based on the weakest precondition calculus. Our technique post-processes the results of the over-approximating analysis by solving the produced constraint systems and generating and executing concrete test-cases that satisfy the given constraint systems. Only test-cases that confirm the results of the over-approximating static analysis are presented to the user. This technique has the important side-benefit of making the results of a weakest-precondition based static analysis easier to understand for human consumers. We show examples from our experiments that visually demonstrate the difference between hundreds of complicated constraints and a simple corresponding JUnit test-case. Besides eliminating language-level unsound bug warnings, we present an additional technique that also addresses user-level unsound bug warnings. This technique pre-processes the testee with a dynamic analysis that takes advantage of actual user data. It annotates the testee with the knowledge obtained from this pre-processing step and thereby provides guidance for the over-approximating analysis. We also present an improvement to dynamic invariant detection for object-oriented programming languages. Previous approaches do not take behavioral subtyping into account and therefore may produce inconsistent results, which can throw off automated analyses such as the ones we are performing for bug-finding. Finally, we address the problem of unwanted dependencies between test-cases caused by global state. We present two techniques for efficiently re-initializing global state between test-case executions and discuss their trade-offs. We have implemented the above techniques in the JCrasher, Check 'n' Crash, and DSD-Crasher tools and present initial experience in using them for automated bug finding in real-world Java programs.

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