The conventional floating gate NVSM will suffer some limitations for continued scaling of the device structure. Therefore, two approaches, the silicon-oxide-nitride-oxide-silicon (SONOS) and the nanocrystal nonvolatile memory devices, have been investigated to overcome the limit of the conventional floating gate NVSM. In this thesis, the SONOS-TFT with multiple nanowires structure was proposed and fabricated for memory applications. The memory characteristic of standard SONOS-TFT, channel width of the device is 1£gm, was compared with the nanowires SONOS-TFT, each channel width of the device is 65nm. The SONOS-TFT with multiple nanowires structure (NW SONOS-TFT) has good program/erase efficiency, retention and transfer characteristics due to the larger electric field at the corner region and more number of corners. The NW SONOS-TFTs can be treated as high performance devices and also as high program/erase efficiency nonvolatile memory under adequate voltage range operation. The fabrication of SONOS-TFTs with nano-wire channels is quite easy and involves no additional processes. Such a SONOS-TFT is thereby highly promising for application in the future system-on-panel display applications. In addition, the metal nanocrystals nonvolatile memory fabricated at low temperature is also studied in this thesis. The Ni-silicide nanocrystals memory was successfully fabricated at low temperature. The rapid thermal oxidation at low temperature was executed to make the metal nanocrystals aggregate. The device has superior memory characteristics, such as program/erase efficiency, retention time and endurance. The nonvolatile metal nanocrystals memory fabricated at low temperature processes is very promising for the application on the portable products and panel displays.

The conventional floating gate NVSM will suffer some limitations for continued scaling of the device structure. Therefore, the silicon-oxide-nitride-oxide-silicon (SONOS) and the nanocrystal nonvolatile memory devices, have been investigated to overcome the limit of the conventional floating gate NVSM. For driving device application, we have used multilayer ONO gate dielectrics to make change the effective dielectric constant. The proposed TFT with ONO gate dielectrics have better gate control ability. On the other hand, nanowire has larger electric-field in the corner region at the same voltage. The SONOS-TFT with multiple nanowire channels have superior electrical characteristic, such as lower threshold voltage, higher On/Off ratio, steeper subthreshold slope, and superior driving ability. The memory characteristic of standard SONOS-TFT, channel width of the device is 1£gm, was compared with the nanowires SONOS-TFT, each channel width of the device is 65nm. The SONOS-TFT with multiple nanowires structure (NW SONOS-TFT) has good program/erase efficiency, retention, transfer characteristics and can suppress gate injection effectively. These characteristics are due to the larger electric field at the corner region and more number of corners. The NW SONOS-TFTs can be treated as high performance devices and also as high program/erase efficiency nonvolatile memory under adequate voltage range operation. In this thesis, the P/E characteristics at different temperatures will also be measured and discussed. The fabrication of SONOS-TFTs with nano-wire channels is quite easy and involves no additional processes. Such a SONOS-TFT is there by highly promising for application in the future system-on-panel display applications. The SONOS-TFTs combined the TFT and memory properties at the same time. Furthermore, the process flow is compatible with conventional poly-Si TFTs fabrication without additional process steps. Hence, the application of SONOS TFTs structure can reach the goal of system on panel (SOP) in the future.