Condenser MEMS microphones are becoming a promising technology to substitute the current standard microphones, and modelling such systems has become very important for designing a condenser microphone fulfilling the given constrains. In this dissertation a deep analysis of capacitive MEMS microphone has been presented coming up with a complete model which is able to fit the experimental data of the microphone sensitivity. Furthermore, a simple noise model, able to fit the experimental data, has been developed considering the well-know Brownian noise and the more subtle 1/f component, usually neglected. With such models, it is possible to have a reliable estimation of the microphone SNR. Many characterizations have been performed on the produced samples and different problems of the manufacturing process have been highlighted, gaining a deeper understanding on the structure of the microphone and on the production process. Finally, to reply to the more and more demanding constraints, two applications of control law have been applied: a force feedback and a controller to tune the resonant frequency of the microphone. This last application shows how a controller can make the system more flexible and reduce the problem of some defects on the production. The force feedback is a technique already used in MEMS systems, such as gyroscopes and accelerometers, where it has shown to be able to improve the performance of the systems. In the presented configuration, a force feedback has been implemented in a digital readout interface, realizing the so-called electromechanical sigma delta converter. Its stability has been evaluated and the improvements have been verified experimentally: due to the extra filtering action of the embedded MEMS system inside the converter loop, the A-weighted in-band noise has been reduced from -63dBA to -73dBA.

A low-cost THz sensor, with a broadband high responsivity, low noise equivalent power, and capable of working at room temperature is still a challenge. Moreover, sensor integration with signal processing electronics is required in order to realize compact systems to be used in commercial imaging applications. In this thesis, CMOS FET-based THz detectors and with integrated noise-efficient readout circuits are presented as a solution. In an attempt to improve the THz focal plane arrays state of the art, the use of an imager architecture is proposed, where each sensing element of an array can be addressed individually. This architecture provides better system performance in terms of sensitivity, resolution or speed. A first chip was fabricated in the LFoundry 0.15-µm standard CMOS technology containing a 16 x 16 staring imaging array for terahertz detection in the range of 0.8 THz to 1.5 THz. Each pixel is composed of an antenna, a FET detector, and its readout electronics (a current integrator) so as the whole matrix can be integrated simultaneously. The current integrator employs an amplifier with two offset compensation techniques (chopper and current injection) and an output saturation control by adding and subtracting voltages. A second chip composed of 15 test structures was fabricated in the STMicrolectronics 0.13 µm standard CMOS technology for terahertz detection at 600 GHz, 850 GHz and 1.5 THz. This chip contains different FET detectors (transistor and antenna) and switched-capacitor readout circuits that provide both signal amplification and filtering, improving the system SNR after each operation cycle. A comparative study of their performance is done as a first step towards a future array implementation (THz camera). For both chips, electrical and terahertz characterization results of the designed structures are presented and discussed.

In this thesis we present a novel BJT (Bipolar Junction Transistor) detector that was developed and optimized for alpha particle and radon detection and monitoring. Using functional tests, we have shown that BJT detector operated with floating base can efficiently be used for the purpose of alpha-particle and, consequently, radon gas detection. Basing on these results, we have designed and fabricated a new batch of optimized BJT detectors. The results of electrical and functional characterization of newly fabricated detectors were presented in this work. Fabricated detectors observed high gain, low leakage currents and good detection properties. In parallel to the development of the detector, we successfully designed and implemented FPGA-based readout electronics ALPHADET. Design of the board and results of electrical tests of the board along with extensive data acquired by BJT detectors coupled to the board are presented in the thesis as well. The results of radon tests acquired using BJT detector confirmed that the detector can be successfully used in systems for radon monitoring.

Custom CMOS vision sensors could offer large opportunities for ultra-low power applications, introducing novel visual computation paradigms, aimed at closing the large gap between vision technology and energy-autonomous sensory systems. Energy-aware vision could offer new opportunities to all those applications, such as security, safety, environmental monitoring and many others, where communication infrastructures and power supply are not available or too expensive to be provided. This thesis aims at demonstrating this concept, exploiting the potential of an energy-aware vision sensor, developed at FBK, that extracts the spatial contrast and delivers compressed data. As a case study, a custom stereo-vision algorithm has been developed, taking advantage of the sensor characteristics, targeted to a lower complexity and reduced memory with respect to a standard stereo-vision processing. Under specific conditions, the proposed approach has proven to be very promising, although much work has still to be done both at sensor and at processing levels.The last part of this thesis is focused on the improvement of the custom sensor. A novel vision sensor architecture has been developed, which is based on a proprietary algorithm, developed by a partner of FBK and targeted to surveillance applications. The algorithm is based on adaptive temporal contrast extraction and is very suitable to be implemented at chip level. Although the output of the algorithm has strong similarities with the spatial contrast vision sensor, it relies on temporal contrast rather than spatial one, which is much more robust for event detection applications. A first prototype of ultra-low power adaptive temporal contrast vision sensor has been developed and tested.

In the last several years, both scientific and industrial community have shown an increasing interest in range imaging due to its potential use in various application domains such as robotics, vehicle safety, gaming, mobile applications as well as many others. Among the diversity of techniques available for range detection, Time-of-Flight (TOF) offers advantages in terms of compact system realization, good performance and low required computational power. Recent works have shown a trend towards higher resolutions, with a consequent reduction of pixel size, higher modulation frequencies and demodulation contrast to allow a higher distance precision. In this thesis we propose a new concept of range camera exploiting linear-mode avalanche photodiodes as in-pixel demodulating detectors. Due to photocurrent gain modulation, avalanche photodiodes can combine optical sensing and light signal demodulation in a single device. The main advantage of the avalanche photodiode implementation is the possibility to operate at high frequencies due to its very wide bandwidth that, in turn, influences the precision in distance measurement. In a first stage, the concept was experimentally validated on single pixel structures. These measurement results encouraged the implementation of a time-of-flight image sensor. A 64x64 pixel array has been designed and fabricated in a 0.35um standard CMOS technology. The pixel pitch is 30um with a fill-factor of 25.7%. Demodulation contrast exceeds 85% at 25MHz modulation frequency. A 3D camera system demonstrates best precision of 1.9cm and a 3D frame rate of 200fps. Additional tests performed on single pixels have shown demodulation contrast as high as 80% measured at 200MHz modulation frequency.

To analyze embedded systems, engineers use tools that can simulate the performance of software components executed on hardware architectures. When the embedded system functionality is strongly correlated to physical quantities, as in the case of Cyber-Physical System (CPS), we need to model physical processes to determine the overall behavior of the system. Unfortunately, embedded systems simulators are not generally suitable to evaluate physical processes, and in the same way physical model simulators hardly capture the functionality of computing systems. In this work, we present a methodology to concurrently explore these aspects using the metroII design framework. The methodology provides guidelines for the implementation of these models in the design environment. To demonstrate the feasibility of the proposed approach, we applied the methodology to two case studies. A case study regards a binaural guidance system developed to be included into a smart rollator for older adults. The second case consists of an energy recovery device which gets energy from the heat dissipated by a high performance processor and power a smart sink able to provide cooling or to serve as a wireless sensing node.

Positron Emission Tomography (PET) scanners provide functional three-dimensional images of the body that are extremely useful in cancer and brain research. The goal of this work is the modeling, design and characterization of a CMOS-based photodetector for PET. To this aim, first a model for the energy resolution and coincidence resolution time (CRT) for digital, SPAD-based detectors is developed. Then, a top-to-bottom detector architecture is proposed, containing an innovative in-pixel com-pression technique that allows for high fill-factor (FF) and efficient readout. At the top-level of the architecture, an integrated discriminator monitors the photon flux for incoming gamma events, enabling an event-based readout scheme. The first complete implementation of this archi-tecture is described, the SPADnet-I sensor, which is composed by an 8×16 pixel array, each of around 0.6 × 0.6 mm2 with 720 SPADs, resulting in a pixel FF of 42.6%. The sensor can obtain the discrete photon flux estimation at up to 100 Msamples/s, which are used by the discriminator and also output at real-time. The complete characterization of the sensor is presented, and the best sensor configuration was found to be at 84% of the SPADs enabled (disabled starting with the highest DCR one), with 2 V SPAD excess bias and 150 ns integration time. This configuration results in an energy resolution of 10.8% and a CRT of 288 ps, the latter which was obtained with a new, hardware-friendly time of arrival (ToA) estimation algorithm, also described in this thesis. Finally, the sensor model, validated by the experimental results, is used to predict the perfor-mance of possible modifications in the sensor, and some design improvements are suggested for a future implementation of the architecture.

This doctorate thesis is focused on the design, fabrication and characterization of Micro Electro Mechanical System (MEMS) Vibrational Energy Harvesters (VEHs). The targeted field of application of such devices is the emerging Internet of Things (IoT), in particular for Ultra Low Power (ULP) autonomous applications. In order to realize the ubiquitous paradigm remote and distributed nodes have to be small and in high number. The power requirement of such nodes is generally satisfied by means of batteries, which require periodic replacement and so are not desirable in an autonomous system. To overcome this limitation devices able to harvest energy from the surrounding environment have been investigated. Among the different sources of energy that could be harvested, the vibrational one results promising due to its high power density and its spreading in most environments of interest. The devices developed convert the vibrational energy scattered in the environment into electrical energy by means of a piezoelectric material. The thesis presents studies on both the mechanical and the electric design of a MEMS piezoelectric VEH, with particular attention on multi-modal design. The thesis presents a novel multi-modal device able to extract energy from multiple resonances in a wider bandwidth. Such a design presents two enabling features for IoT application, a wider working band and the compactness, making it more attractive with respect to cantilever like devices.

Automatic monitoring of environments, resouces and human processes are crucial and foundamental tasks to improve people's quality of life and to safeguard the natural environment. Today, new technologies give us the possibility to shape a greener and safer future. The more specialized is the kind of monitoring we want to achieve, more tight are the constraints in terms of reliability, low energy and maintenance-free autonomy. The challenge in case of tight energy constraints is to find new techniques to save as much power as possible or to retrieve it from the very same environment where the system operates, towards the realization of energy neutral embedded monitoring systems. Energy efficiency and battery autonomy of such devices are still the major problem impacting reliability and penetration of such systems in risk-related activities of our daily life. Energy management must not be optimized to the detriment of the quality of monitoring and sensors can not be operated without supply. In this thesis, I present different embedded system designs to bridge this gap, both from the hardware and software sides, considering specific resource constrained scenarios as case studies that have been used to develop solutions with much broader validity. Results achieved demonstrate that energy neutrality in monitoring under resource constrained conditions can be obtained without compromising efficiency and reliability of the outcomes.

In recent years, Silicon Photomultipliers (SiPMs) have been increasingly used as photo-detectors in Positron Emission Tomography (PET) application, which is a nuclear imaging tech-nique that is used to accurately image biochemical processes inside the human body. A SiPM is composed by an array of parallel connected micro-cells of Single Photon Avalanche Diodes (SPADs), and can be classified mainly into two categories Digital-SiPMs (D-SiPMs) and Analog-SiPMs (A-SiPMs). In A-SiPMs, all the microcells share the same bias voltage and have a common readout line. Through custom manufacturing process, the performance of A-SiPMs can be exten-sively optimized. With respect to A-SiPMs, D-SiPMs are composed by many SPAD pixels, each one containing one SPAD and local front-end circuitry. The digital SiPM takes advantage of CMOS technology to perform a 1-b direct A/D conversion per SPAD thus providing a fully digi-tal implementation. On the other hand, SPADs fabricated in CMOS process typically suffer high noise since the critical SPAD implants can hardly be optimized by using the standard CMOS process flow. The main activities carried out within this PhD thesis have been focused on two critical as-pects relevant for the optimization of PET systems performance: (I) the improvement of the per-formance of SPAD in D-SiPMs and (II) the development of high-performance A-SiPM readout application specific integrated circuit (ASIC). Concerning the first point, novel SPADs have been fabricated in CMOS 150-nm technology targeting at low noise, high sensitivity and excellent timing jitter. Three structures with different shapes, geometries and diameters, have been implemented in three test chips. Measurement re-sults of one p+/n-well SPAD array show a 0.4Hz/µm2 dark count noise, 0.85% afterpulsing for a dead time of 150ns at 3V excess bias. The photon detection probability is about 31% at 450nm wavelength at 5V excess bias. The SPAD exhibits a timing jitter of 82ps (FWHM) under a blue laser, which is potentially suitable for D-SiPMs in PET application. The second objective of this PhD work was to develop A-SiPM readout ASIC for PET appli-cation. To utilize the high intrinsic time resolution of A-SiPMs, the development of specialized, highly integrated readout electronics is required. Therefore, two ASICs, first chip with test struc-tures and 16 channels and the second chip with 32 channels, have been developed in 150-nm CMOS technology, with the aim of developing a compact A-SiPM module. The performance of the second chip has been validated by using 3 × 3 × 5 mm3 LYSO crystals coupled to 4 × 4 mm2 SiPMs (FBK-NUV-HD). The measurements show an energy resolution of 14.7% FWHM for the detection of 511 keV photons and the coincidence time resolution is 433ps (FWHM). To improve the timing resolution, part of the PhD work was carried on Stanford University, focused on char-acterization of A-SiPMs and analysis of noise contribution.