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Yuan Meng. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 85-91). / Abstracts in English and Chinese. / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- History of ASR development --- p.2 / Chapter 1.2 --- Fundamentals of automatic speech recognition --- p.3 / Chapter 1.2.1 --- Classification of ASR systems --- p.3 / Chapter 1.2.2 --- Automatic speech recognition process --- p.4 / Chapter 1.3 --- Performance measurements of ASR --- p.7 / Chapter 1.3.1 --- Recognition accuracy --- p.7 / Chapter 1.3.2 --- Complexity --- p.7 / Chapter 1.3.3 --- Robustness --- p.8 / Chapter 1.4 --- Motivation and goal of this work --- p.8 / Chapter 1.5 --- Thesis outline --- p.10 / Chapter 2 --- Signal processing techniques for front-end --- p.12 / Chapter 2.1 --- Basic feature extraction principles --- p.13 / Chapter 2.1.1 --- Pre-emphasis --- p.13 / Chapter 2.1.2 --- Frame blocking and windowing --- p.13 / Chapter 2.1.3 --- Discrete Fourier Transform (DFT) computation --- p.15 / Chapter 2.1.4 --- Spectral magnitudes --- p.15 / Chapter 2.1.5 --- Mel-frequency filterbank --- p.16 / Chapter 2.1.6 --- Logarithm of filter energies --- p.18 / Chapter 2.1.7 --- Discrete Cosine Transformation (DCT) --- p.18 / Chapter 2.1.8 --- Cepstral Weighting --- p.19 / Chapter 2.1.9 --- Dynamic featuring --- p.19 / Chapter 2.2 --- Practical issues --- p.20 / Chapter 2.2.1 --- Review of practical problems and solutions in ASR appli- cations --- p.20 / Chapter 2.2.2 --- Model of environment --- p.23 / Chapter 2.2.3 --- End-point detection (EPD) --- p.23 / Chapter 2.2.4 --- Spectral subtraction (SS) --- p.25 / Chapter 3 --- HMM-based Acoustic Modeling --- p.26 / Chapter 3.1 --- HMMs for ASR --- p.26 / Chapter 3.2 --- Output probabilities --- p.27 / Chapter 3.3 --- Viterbi search engine --- p.29 / Chapter 3.4 --- Isolated word recognition (IWR) & Connected word recognition (CWR) --- p.30 / Chapter 3.4.1 --- Isolated word recognition --- p.30 / Chapter 3.4.2 --- Connected word recognition (CWR) --- p.31 / Chapter 4 --- DSP for embedded applications --- p.32 / Chapter 4.1 --- "Classification of embedded systems (DSP, ASIC, FPGA, etc.)" --- p.32 / Chapter 4.2 --- Description of hardware platform --- p.34 / Chapter 4.3 --- I/O operation for real-time processing --- p.36 / Chapter 4.4 --- Fixed point algorithm on DSP --- p.40 / Chapter 5 --- ASR algorithm optimization --- p.42 / Chapter 5.1 --- Methodology --- p.42 / Chapter 5.2 --- Floating-point to fixed-point conversion --- p.43 / Chapter 5.3 --- Computational complexity consideration --- p.45 / Chapter 5.3.1 --- Feature extraction techniques --- p.45 / Chapter 5.3.2 --- Viterbi search module --- p.50 / Chapter 5.4 --- Memory requirements consideration --- p.51 / Chapter 6 --- Experimental results and performance analysis --- p.53 / Chapter 6.1 --- Cantonese isolated word recognition (IWR) --- p.54 / Chapter 6.1.1 --- Execution time --- p.54 / Chapter 6.1.2 --- Memory requirements --- p.57 / Chapter 6.1.3 --- Recognition performance --- p.57 / Chapter 6.2 --- Connected word recognition (CWR) --- p.61 / Chapter 6.2.1 --- Execution time consideration --- p.62 / Chapter 6.2.2 --- Recognition performance --- p.62 / Chapter 6.3 --- Summary & discussion --- p.66 / Chapter 7 --- Implementation of practical techniques --- p.67 / Chapter 7.1 --- End-point detection (EPD) --- p.67 / Chapter 7.2 --- Spectral subtraction (SS) --- p.71 / Chapter 7.3 --- Experimental results --- p.72 / Chapter 7.3.1 --- Isolated word recognition (IWR) --- p.72 / Chapter 7.3.2 --- Connected word recognition (CWR) --- p.75 / Chapter 7.4 --- Results --- p.77 / Chapter 8 --- Conclusions and future work --- p.78 / Chapter 8.1 --- Summary and Conclusions --- p.78 / Chapter 8.2 --- Suggestions for future research --- p.80 / Appendices --- p.82 / Chapter A --- "Interpolation of data entries without floating point, divides or conditional branches" --- p.82 / Chapter B --- Vocabulary for Cantonese isolated word recognition task --- p.84 / Bibliography --- p.85

by Bill, Kan Shek Chow. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1997. / Includes bibliograhical references (leaves 39-40). / Chapter Chapter 1. --- Introduction --- p.1 / Chapter Chapter 2. --- The spectrogram --- p.4 / Chapter 2.1 --- Speech signal background --- p.4 / Chapter 2.2 --- Windowed Fourier transform --- p.4 / Chapter 2.3 --- Kernel function --- p.6 / Chapter 2.4 --- Spectrum analysis --- p.7 / Chapter 2.5 --- Spectrogram --- p.9 / Chapter 2.6 --- Reducing dimension of the spectrogram 一 Filter banks --- p.12 / Chapter 2.7 --- Recent experiment on filter banks --- p.12 / Chapter Chapter 3. --- Spectrogram compression --- p.15 / Chapter 3.1 --- Capturing the movement of the spectrum along time --- p.16 / Chapter 3.2 --- Informative statistics ´ؤ peak distance --- p.18 / Chapter 3.3 --- Estimated spectrogram --- p.21 / Chapter 3.4 --- Relationship between spectrogram and the speech signal --- p.22 / Chapter Chapter 4. --- The phase problem --- p.27 / Chapter 4.1 --- The role of the Fourier phase --- p.27 / Chapter 4.2 --- Iteration scheme --- p.27 / Chapter 4.3 --- Smoothing on the noise ´ؤ interpolation --- p.34 / Chapter Chapter 5. --- Conclusion and further discussion --- p.37 / Chapter 5.1 --- Conclusion --- p.37 / Chapter 5.2 --- Further discussion --- p.38 / References --- p.39

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The refraction convolution section (RCS) is a simple and efficient method for full trace processing of shallow seismic refraction data. It facilitates improved interpretation of shallow seismic refraction data through the convenient use of amplitudes as well as traveltimes. The RCS is generated by the convolution of forward and reverse shot records. The convolution operation effectively adds the first arrival traveltimes of each pair of forward and reverse traces and produces a measure of the depth to the refracting interface in units of time which is equivalent to the time-depth function of the generalized reciprocal method (GRM). The convolution operation also multiplies the amplitudes of first arrival signals. This operation compensates for the large effects of geometric spreading to a very good first approximation, with the result that the convolved amplitude is essentially proportional to the square of the head coefficient. The head coefficient is approximately proportional to the ratio of the specific acoustic impedances in the upper layer and in the refractor, where there is a reasonable contrast between the specific acoustic impedances in the layers. The RCS can also include a separation between each pair of forward and reverse traces in order to accommodate the offset distance in a manner similar to the XY spacing of the GRM. Lateral variations in the near-surface soil layers can effect amplitudes thereby causing 'amplitude statics'. Increases in the thickness of the surface soil layer correlate with increases in refraction amplitudes. These increases are adequately described and corrected with the transmission coefficients of the Zoeppritz equations. The minimum amplitudes, rather than an average, should be used where it is not possible to map the near surface layers. The use of amplitudes with 3D data effectively improves the spatial resolution by almost an order of magnitude. Amplitudes provide a measure of refractor wavespeeds at each detector, whereas the analysis of traveltimes provides a measure over several detectors, commonly a minimum of six. The ratio of amplitudes obtained with different shot azimuths provides a detailed qualitative measure of azimuthal anisotropy. Dip filtering of the RCS removes 'cross-convolution' artifacts and provides a convenient approach to the study of later events. The RCS facilitates the stacking of refraction data in a manner similar to the CMP methods of reflection seismology. It can improve signal-to-noise ratios.

The importance of spectral efficiency in mobile communications often requires the use of non-constant-envelop linear digital modulation schemes. These modulation techniques carry signal information in both magnitude and phase, thus they must be linearly amplified to avoid nonlinear signal distortion which is not correctable in a typical receiver. A second difficulty in utilizing these modulation formats is that nonlinear amplification generates out-of-band power (spectral regrowth). Therefore, to achieve both high energy efficiency and spectral efficiency, some forms of linearization must be used to compensate for the nonlinearity of power amplifiers. One powerful technique that is amenable to monolithic integration is digital signal predistortion. Most predistorters try to achieve the inverse nonlinear characteristic of High Power Amplifier(HPA). In this thesis a new multi-stage digital adaptive signal predistorter is presented. The scheme is developed from the direct iterative method with low memory requirement proposed by Cavers [1] in combination with the multi-stage predistortion proposed by Stonick [2]. To make the predistorter more compact a very simple and fast method called the complementary method is proposed. The complementary method has prominent advantages over other digital predistorters in terms of stability of the algorithm, complexity of the algorithm and computational load. / Graduation date: 2001

Traditionally sinusoidal signal generation has been implemented with purely analog circuits such as phase-locked loops. The alternative of using a digital system to perform this signal generation has previously been unattractive due to limitations in clock frequency and size. However, recent advancements in sub-micron fabrication techniques have made the digital alternative tractable. The advantages of a digitally implemented signal frequency synthesizer include finer control of output frequency, reduced frequency drift due to part degradation over time, and faster response time for frequency change. Digital frequency synthesis has been previously realized using the Tierney, Rader, and Gold phase accumulator architecture. This method utilizes a variable-increment digital integrator that is input to a read-only memory. This memory then generates a quantized amplitude value. This thesis presents an alternative method for digital frequency synthesis based on circular interpolation and compares it to the performance of a comparable phase-accumulator structure for varying bit accuracies of phase. The comparison of transistor count and required die-size for each method reveals a lower requirement of both resources in the case of the new circle interpolator. Evaluation of the discrete-time spectral purity of synthesized signals also demonstrates less out of band noise in the new design. Finally, analysis of energy efficiency shows the new design to be generally optimal compared to the reference design. / Graduation date: 2001

A comparison of two novel demodulators. The first is a basic zero crossing demodulator, as introduced by Beards. The second is an approach proposed by Hovin. The two demodulators are compared to each other and to the conventional method of demodulation. / Graduation date: 1998

The advent of serial tera-bit telecommunication and multi-gigahertz I/O interfaces is posing challenges on the semiconductor and ATE industries. There is a gap in signal integrity testing between what has been specified in serial link standards and what can be practically tested in production. A thorough characterization and a more cost-effective test of the signal integrity, such as BER, jitter, and eye margin, are critical to identify and isolate the root cause of the system degradation and to the binning in production. In this dissertation, measurement and testing schemes on signal integrity are explored. A solution for diagnosing jitter and predicting the range of consequent BER is proposed. This solution is applicable to decomposition of correlated and uncorrelated jitter in both clock and data signals. The statistical information of jitter is estimated using TLC functions. TLC treats jitter in its original form, as a time series, resulting in good accuracy in the decomposition. Hardware results in a PLL indicate that the approach is still valid when the traditional histogram-based method fails. This approach can be implemented using only one-shot capture instead of multiple captures to average out the uncorrelated jitter from the correlated jitter. Therefore, the TLC functions enable test time reduction in jitter decomposition compared to traditional averaging methods. Hardware measurements on stressed data signals are presented to validate the proposed technique. We have also explored low cost, high bandwidth techniques using Built In Self Test(BIST) for on-chip jitter measurement. Undersampling provides a lowcost test solution for on-chip jitter measurement. However, it suffers from sampling clock phase error and time quantization noise. These timing uncertainties on the test accuracy of the traditional technique using a single channel structure can be alleviated by extracting the correlation between two channels using a single reference clock. Simulation results indicate that the proposed approach can achieve a better measurement accuracy and a higher degree of tolerance to sampling clock uncertainty and quantization error than does the single-channel structure, with little additional test overhead. TIADCs provide an attractive solution to the realization of analog front ends in high speed communication systems,such as 10GBASE-T and 10GBASEFiber. However, gain mismatch, offset mismatch, and sampling time mismatch between time-interleaved channels limit the performance of TIADCs. A low-cost test scheme is developed to measure timing mismatch using an undersampling clock. This method is applicable to an arbitrary number of channels, achieving picosecond resolution with low power consumption. Simulation results and hardware measurements on a 10GSps TIADC are presented to validate the proposed technique. / text

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