As modern microelectronics advances, enormous challenges have to be overcome in order to further increase device performance, enabling highspeed and ultra-low-power applications. With progressive scaling of Silicon MOSFETs, charge carrier mobility has dropped significantly and became a critical device parameter over the last decade. Present technology nodes make use of strain engineering to partially recover this mobility loss. Even though carrier mobility is a crucial parameter for present technology nodes, it cannot be determined accurately by methods typically available in industrial environments. A major objective of this work is to study the magnetoresistance mobility μMR of strained VLSI devices based on a 28 nm ground rule. This technique allows for a more direct access to charge carrier mobility, compared to conventional current/ voltage and capacitance/ voltage mobility derivation methods like the effective mobility μeff, in which series resistance, inversion charge density and effective channel length are necessary to extract the mobility values of the short channel devices. Aside from providing an anchor for accurate μeff measurements in linear operation conditions, μMR opens the possibility to investigate the saturation region of the device, which cannot be accessed by μeff. Electron and hole mobility of nFET and pFET devices with various gate lengths are studied from linear to saturation region. In addition, the interplay between mobility enhancement due to strain improvement, and mobility degradation due to short channel effects with decreasing channel length is analyzed. As a concept device for future nanoelectronic building blocks, silicon nanowire Schottky field-effect transistors are investigated in the second part of this work. These devices exhibit an ambipolar behaviour, which gives the opportunity to measure both electron and hole transport on a single device. The temperature dependence of the source/drain current for specific gate and drain voltages is analyzed within the framework of voltage dependent effective barrier heights.:1. Einleitung 2. Theoretische Grundlagen 3. Charakterisierungsmethoden 4. Messaufbau 5. Ergebnisse der Untersuchungen an MOSFETs 6. Ergebnisse der Untersuchungen an SiNW Transistoren 7. Zusammenfassung Anhang Danksagungen

Silicon nanowire based multiple gate metal oxide field effect transistors(MG-MOSFET) appear as replacements for conventional bulk transistors in post 45nm technology nodes. In such transistors the short channel effect(SCE) is controlled by the device geometry, and hence an undoped (or, lightly doped) ultra-thin body silicon nanowire is used to sustain the channel. The use of undoped body also solves several issues in bulk MOSFETs e.g., random dopant fluctuations, mobility degradation and compatibility with midgap metal gates. The electrostatic integrity of such devices increases with the scaling down of the body thickness. Since the quantization of electron energy cannot be ignored in such ultra-thin body devices, it is extremely important to consider quantum effects in their threshold voltage models. Most of the models reported so far are valid for long channel double gate devices. Only Munteanu et al. [Journal of non-crystalline solids vol 351 pp 1911-1918 2005] have reported threshold voltage model for short channel symmetric double gate MOSFET, however it involves unphysical fitting parameters. Only Munteanu et al.[Molecular simulation vol 31 pp 839-845 2005] reported threshold voltage model for quad gate transistor which is implicit in nature. On the other hand no modeling work has been reported for other types of MG-MOSFETs (e.g., tri gate, cylindrical body)apart from numerical simulation results. In this work we report physically based closed form quantum threshold voltage models for short channel symmetric double gate, quad gate and cylindrical body gate-all-around MOSFETs. In these devices quantum effects aries mainly due to the structural confinement of electron energy. Proposed models are based on the analytical solution of two or three-dimensional Poisson equation and one or two-dimensional Schrodinger equation depending on the device geometries. Judicial approximations have been taken to simplify the models in order to make them closed form and efficient for large scale circuit simulation. Effort has also been put to model the quantum threshold voltage of tri gate MOSFET. However it is found that the energy quantization in tri gate devices are mainly due to electronic confinement and hence it is very difficult to develop closed form analytical equations for the threshold voltage. Thus in this work the modeling of tri gate devices have been limited to long channel cases. All the models are validated against the professional numerical simulator.